公开(公告)号：US20160018741A1

公开(公告)日：2016-01-21

申请号：US14470955

申请日：2014-08-28

Applicant: UNITED MICROELECTRONICS CORPORATION

Inventor： EN-CHIUAN LIOU ,  TENG-CHIN KUO ,  YUAN-CHI PAI ,  CHUN-CHI YU

IPC: G03F7/20

CPC classification number: G03F7/70633

Abstract: An asymmetry compensation method used in a lithography overlay process and including steps of: providing a first substrate, wherein a circuit layout is disposed on the first substrate, a first mask layer and a second mask layer together having an x-axis allowable deviation range and an y-axis allowable deviation range relative to the circuit layout are stacked sequentially on the circuit layout, wherein the x-axis allowable deviation range is unequal to the y-axis allowable deviation range; and calculating an x-axis final compensation parameter and an y-axis final compensation parameter base on the unequal x-axis allowable deviation range and the y-axis allowable deviation range.

Abstract translation: 一种在光刻重叠工艺中使用的不对称补偿方法，包括以下步骤：提供第一衬底，其中电路布局设置在第一衬底上，第一掩模层和第二掩模层一起具有x轴允许偏差范围，以及 相对于电路布局的y轴允许偏差范围依次堆叠在电路布局上，其中x轴允许偏差范围不等于y轴允许偏差范围; 并且基于不等的x轴允许偏差范围和y轴允许偏差范围来计算x轴最终补偿参数和y轴最终补偿参数。