公开(公告)号：US10310546B2

公开(公告)日：2019-06-04

申请号：US15730407

申请日：2017-10-11

Applicant: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA

Inventor： Yindong Xiao ,  Guangkun Guo ,  Ke Liu ,  Junwu Zhang ,  Houjun Wang ,  Jianguo Huang ,  Shulin Tian

IPC: G06F1/02 ,  G06F15/78 ,  H03K4/02 ,  G01R31/28 ,  G10H1/12 ,  G06F1/03 ,  G06F13/28

Abstract: The present invention provides an arbitrary waveform generator based on instruction architecture. To deal with the feature that the instructions and waveform data of the AWG are coupled in the prior art, an instruction set based waveform synthesis controller is employed, and substitutes for the sequence wave generator in the present invention, i.e. an arbitrary waveform generator based on instruction architecture. Thus the time-sharing scheduling in reading the waveform synthesis instruction and the segment waveform data is realized, and the complexity of the hardware is reduced, so that the AWG in present invention can synthesize and generate a complex sequence wave rapidly and efficiently.