公开(公告)号：US10310546B2

公开(公告)日：2019-06-04

申请号：US15730407

申请日：2017-10-11

Applicant: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA

Inventor： Yindong Xiao ,  Guangkun Guo ,  Ke Liu ,  Junwu Zhang ,  Houjun Wang ,  Jianguo Huang ,  Shulin Tian

IPC: G06F1/02 ,  G06F15/78 ,  H03K4/02 ,  G01R31/28 ,  G10H1/12 ,  G06F1/03 ,  G06F13/28

Abstract: The present invention provides an arbitrary waveform generator based on instruction architecture. To deal with the feature that the instructions and waveform data of the AWG are coupled in the prior art, an instruction set based waveform synthesis controller is employed, and substitutes for the sequence wave generator in the present invention, i.e. an arbitrary waveform generator based on instruction architecture. Thus the time-sharing scheduling in reading the waveform synthesis instruction and the segment waveform data is realized, and the complexity of the hardware is reduced, so that the AWG in present invention can synthesize and generate a complex sequence wave rapidly and efficiently.

公开(公告)号：US10156603B1

公开(公告)日：2018-12-18

申请号：US15729298

申请日：2017-10-10

Applicant: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA

Inventor： Zaiming Fu ,  Hanglin Liu ,  Jianguo Huang ,  Yijiu Zhao

IPC: H03K3/84 ,  G01R31/317 ,  G01R31/3193 ,  G01R31/30 ,  H03K5/156

Abstract: The present invention provides an apparatus for adding jitters to the edges of a pulse sequence, the pulse sequence which edges is needed to adding jitters to is sent to a first edge-pulse converter and a second edge-pulse converter respectively, and be converted into a rising edge pulse signal and a falling edge pulse signal. The rising edge pulse signal and the falling edge pulse signal are delayed by different fixed times, and for the edge pulse signal which is delayed shorter, it should be further delayed by a programmable delay circuit, thus the edge to which the jitter is added can be adjusted to a leading position or a lagging position according to a jitter data read out from a jitter data storage, so the synthesized pulse sequence with jitter-added edges can be used as test signal for jitter tolerance measurement.