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公开(公告)号:US11030737B2
公开(公告)日:2021-06-08
申请号:US16573922
申请日:2019-09-17
Inventor: Mark M. Tehranipoor , Haoting Shen , Nidish Vashistha , Navid Asadizanjani , Mir Tanjidur Rahman , Damon Woodard
Abstract: A method of detecting hardware Trojans in an IC includes providing a golden IC layout data set or SEM image data taken at long dwelling time on an active area of the golden IC after polishing it from the backside. Next, the IC under authentication (IUA) sample is prepared for fast SEM imagining (shorter dwelling time) after backside thinning. Next step is to perform image processing on the IUA's SEM image, which includes histogram equalization with noise filtering using Gaussian and Median filters. In the last step, the IUA sample data with the shorter dwelling time is compared with the golden IC layout data or the golden image data from high quality (longer dwelling time) SEM scanning process. At the end the result of the comparison is used to identify hardware Trojans.
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公开(公告)号:US20200090325A1
公开(公告)日:2020-03-19
申请号:US16573922
申请日:2019-09-17
Inventor: Mark M. Tehranipoor , Haoting Shen , Nidish Vashistha , Navid Asadizanjani , Mir Tanjidur Rahman , Damon Woodard
Abstract: A method of detecting hardware Trojans in an IC includes providing a golden IC layout data set or SEM image data taken at long dwelling time on an active area of the golden IC after polishing it from the backside. Next, the IC under authentication (IUA) sample is prepared for fast SEM imagining (shorter dwelling time) after backside thinning. Next step is to perform image processing on the IUA's SEM image, which includes histogram equalization with noise filtering using Gaussian and Median filters. In the last step, the IUA sample data with the shorter dwelling time is compared with the golden IC layout data or the golden image data from high quality (longer dwelling time) SEM scanning process. At the end the result of the comparison is used to identify hardware Trojans.
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公开(公告)号:US11087058B1
公开(公告)日:2021-08-10
申请号:US16745744
申请日:2020-01-17
Inventor: Domenic J. Forte , Mark M. Tehranipoor , Qihang Shi , Huanyu Wang , Haoting Shen
Abstract: Embodiments of systems and methods for an FIB-aware anti-probing physical design flow are described in the present disclosure. Such embodiments incorporate new and improved security-critical steps in a physical design flow, in which the design is constrained to provide coverage on asset nets through an internal shield.
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