公开(公告)号：US20220214498A1

公开(公告)日：2022-07-07

申请号：US17605500

申请日：2020-04-24

Applicant: UNIVERSITY OF SOUTHAMPTON

Inventor： David THOMSON ,  Graham REED ,  Wei Wei ZHANG ,  Martin EBERT

IPC: G02B6/122 ,  G02B6/13 ,  G02B6/132 ,  G02B6/136

Abstract: The invention provides a photonic chip comprising: a silicon substrate, an low refractive index layer above the silicon substrate, and a tapered waveguide above the low refractive index layer, the tapered waveguide having a first height at a first end of the tapered waveguide and a second height at a second end of the tapered waveguide, the second height being greater than the first height, and the tapered waveguide having a bottom surface that is closer to the substrate at the second end than at the first end. The invention further provides a method of manufacturing a photonic chip, the method comprising: providing a wafer comprising a silicon substrate, and an low refractive index layer above the silicon substrate, etching the low refractive index layer to form a tapered trench having a first height at a first end of the tapered trench and a second height at a second end of the tapered trench, the first second height being greater than the second first height, and the tapered trench having a bottom surface that is closer to the substrate at the first second end than at the second first end, and forming a tapered waveguide in the tapered trench.

公开(公告)号：US20190250434A1

公开(公告)日：2019-08-15

申请号：US16324748

申请日：2017-08-09

Applicant: University of Southampton

Inventor： Kapil DEBNATH ,  Graham REED ,  Shinichi SAITO

IPC: G02F1/025

CPC classification number: G02F1/025 ,  G02F2001/0152 ,  G02F2201/063 ,  G02F2202/105

Abstract: A method of fabricating an optical structure comprises providing a layer of single crystal crystalline silicon supported on an insulating surface of a silicon substrate; using etching to remove part of the silicon layer and define a side wall which is non-parallel to the insulating surface of the substrate; forming a layer of insulating material over the side wall; forming a further layer of silicon over at least the insulating material; and removing the silicon of the further layer to a level of the layer of silicon such that the layer of insulating material occupies a slot between a portion of silicon in the layer and a portion of silicon in the further layer, a thickness of the layer of insulating material defining a width of the slot.

公开(公告)号：US20220397721A1

公开(公告)日：2022-12-15

申请号：US17779436

申请日：2020-11-27

Applicant: UNIVERSITY OF SOUTHAMPTON

Inventor： David THOMSON ,  Graham REED ,  Weiwei ZHANG ,  Martin EBERT

IPC: G02B6/132 ,  G02B6/122 ,  G02B6/13 ,  G02B6/136

Abstract: A method of manufacturing a photonic chip. The method comprises providing a wafer comprising a silicon substrate, and a low refractive index layer above the silicon substrate, forming a first trench having a first height and a second trench having a second height by etching the low refractive index layer. The second height is greater than the first height and the second trench has a bottom surface that is closer to the substrate than a bottom surface of the first trench.

公开(公告)号：US20220244580A1

公开(公告)日：2022-08-04

申请号：US17587679

申请日：2022-01-28

Applicant: UNIVERSITY OF SOUTHAMPTON

Inventor： Weiwei ZHANG ,  Graham REED ,  David THOMSON ,  Martin EBERT ,  Shinichi SAITO

IPC: G02F1/025

Abstract: A resonator modulator for modulating light in a photonic circuit, the modulator comprising: a capacitor formed of a ring-shaped insulating region sandwiched between an outer conductive region and an inner conductive region, wherein at least one of the outer conductive regions or the inner conductive regions is a polycrystalline semiconductor material.