公开(公告)号：US20200321965A1

公开(公告)日：2020-10-08

申请号：US16957428

申请日：2017-12-28

申请人： Unify Patente GmbH & Co. KG

发明人： Marcelo Samsoniuk ,  Paolo Henrique Bernardi ,  Diogo Wachtel Granado

IPC分类号： H03K19/17764 ,  H03K19/1776 ,  H03K19/17736 ,  H03K19/17704

摘要： A method for programming a Field Programmable Gate Array (FPGA) via a network, the network being operated according to a predetermined communications protocol, can include: establishing a communication connection between the FPGA and an external master, setting the FPGA into a programming mode, the master providing an FPGA programming image to the FPGA in a sequence of frames so that the frames can be parsed and enabling the FPGA to write only during receiving the payload section of the frames. The FPGA programming image and parsing the sequence of frames can be performed by a permanently programmed or hardwired logic component. A network, FPGA, and a communication system can be configured to utilize embodiments of the method.

公开(公告)号：US11171653B2

公开(公告)日：2021-11-09

申请号：US16957428

申请日：2017-12-28

申请人： Unify Patente GmbH & Co. KG

发明人： Marcelo Samsoniuk ,  Paolo Henrique Bernardi ,  Diogo Wachtel Granado

IPC分类号： H03K19/17704 ,  H03K19/17736 ,  H03K19/1776 ,  H03K19/17764

摘要： A method for programming a Field Programmable Gate Array (FPGA) via a network, the network being operated according to a predetermined communications protocol, can include: establishing a communication connection between the FPGA and an external master, setting the FPGA into a programming mode, the master providing an FPGA programming image to the FPGA in a sequence of frames so that the frames can be parsed and enabling the FPGA to write only during receiving the payload section of the frames. The FPGA programming image and parsing the sequence of frames can be performed by a permanently programmed or hardwired logic component. A network, FPGA, and a communication system can be configured to utilize embodiments of the method.