公开(公告)号：US11991837B2

公开(公告)日：2024-05-21

申请号：US17683371

申请日：2022-03-01

Applicant: Unimicron Technology Corp.

Inventor： Ke-Chien Li ,  Chun-Hung Kuo ,  Chih-Chun Liang

IPC: H05K3/46 ,  H05K1/11

CPC classification number: H05K3/4644 ,  H05K1/115

Abstract: A circuit board includes a substrate, a build-up circuit structure, a graphene oxide layer, a graphene layer, and an insulating material layer. The build-up circuit structure is disposed on the substrate, including at least one inner circuit, at least one dielectric layer, an outer circuit, and multiple conductive vias. The dielectric layer is disposed on the inner circuit. The outer circuit is disposed on the dielectric layer. The conductive vias penetrate the dielectric layer and electrically connect the inner circuit and the outer circuit. The graphene oxide layer and the graphene layer are disposed on the build-up circuit structure at an interval. The graphene oxide layer and the graphene layer are respectively disposed in correspondence to the dielectric layer and the outer circuit. The insulating material layer is disposed on the graphene oxide layer and the graphene layer. The insulating material layer has an opening, which exposes the graphene layer.

公开(公告)号：US20220408567A1

公开(公告)日：2022-12-22

申请号：US17683371

申请日：2022-03-01

Applicant: Unimicron Technology Corp.

Inventor： Ke-Chien Li ,  Chun-Hung Kuo ,  Chih-Chun Liang

IPC: H05K3/46 ,  H05K1/11

Abstract: A circuit board includes a substrate, a build-up circuit structure, a graphene oxide layer, a graphene layer, and an insulating material layer. The build-up circuit structure is disposed on the substrate, including at least one inner circuit, at least one dielectric layer, an outer circuit, and multiple conductive vias. The dielectric layer is disposed on the inner circuit. The outer circuit is disposed on the dielectric layer. The conductive vias penetrate the dielectric layer and electrically connect the inner circuit and the outer circuit. The graphene oxide layer and the graphene layer are disposed on the build-up circuit structure at an interval. The graphene oxide layer and the graphene layer are respectively disposed in correspondence to the dielectric layer and the outer circuit. The insulating material layer is disposed on the graphene oxide layer and the graphene layer. The insulating material layer has an opening, which exposes the graphene layer.