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    METHODS OF PACKAGING MICROELECTRONIC DEVICES UTILIZING PANELS AND RELATED TEMPORARY STRUCTURES
    1.
    发明公开
    METHODS OF PACKAGING MICROELECTRONIC DEVICES UTILIZING PANELS AND RELATED TEMPORARY STRUCTURES 审中-公开

    公开(公告)号：US20240357747A1

    公开(公告)日：2024-10-24

    申请号：US18354559

    申请日：2023-07-18

    Applicant: Microchip Technology Incorporated

    Inventor： J. Andrew Kovats

    IPC: H05K1/18 ,  H05K1/11 ,  H05K5/00

    CPC classification number: H05K1/181 ,  H05K1/115 ,  H05K5/0091 ,  H05K2201/10674

    Abstract: Methods may involve supporting a plurality of microelectronic dice on a printed circuit panel. Respective microelectronic dice of the plurality of microelectronic dice may be electrically connected to at least one via of the printed circuit panel. Microelectronic device packages may be singulated from the printed circuit panel, respective microelectronic device packages including at least one microelectronic die of the plurality of microelectronic dice and a portion of the printed circuit panel. Structures may include a plurality of microelectronic dice supported on a printed circuit panel. The printed circuit panel may include vias, subsets of the vias positioned for electrical connection to a respective microelectronic die of the plurality of microelectronic dice.

    EMBEDDED INDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
    4.
    发明公开
    EMBEDDED INDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF 审中-公开

    公开(公告)号：US20240314932A1

    公开(公告)日：2024-09-19

    申请号：US18136358

    申请日：2023-04-19

    Applicant: UNIMICRON TECHNOLOGY CORP.

    Inventor： Chen-An TSAI

    IPC: H05K1/16 ,  H01F17/00 ,  H01F41/04 ,  H05K1/11 ,  H05K3/46

    CPC classification number: H05K1/165 ,  H01F17/0013 ,  H01F41/041 ,  H05K1/115 ,  H05K3/4644 ,  H05K2201/086 ,  H05K2201/09527 ,  H05K2201/09563 ,  H05K2201/1003

    Abstract: The present invention includes an aluminum board, an electromagnet core, and a coil. The aluminum board includes a first surface, a second surface opposite to the first surface, and multiple through vias in communication with the first surface and the second surface. The electromagnet core is mounted on the first surface, and the through vias are located on two opposite sides of the electromagnet core. The coil is mounted through the through vias to wrap around the electromagnet core. An inside wall of each of the through vias forms an anodic aluminum oxide (AAO) by an anodizing process. The present invention is able to decrease via size of a conductive through via of a vertically embedded inductor. This allows through vias to be more densely formed on a board, and thus increases an amount of the coil wrapped around the electromagnetic core and increases inductance of the inductor.

    CIRCUIT STRUCTURE
    5.
    发明公开
    CIRCUIT STRUCTURE 审中-公开

    公开(公告)号：US20240306295A1

    公开(公告)日：2024-09-12

    申请号：US18119268

    申请日：2023-03-08

    Applicant: Advanced Semiconductor Engineering, Inc.

    Inventor： Wen-Long LU

    IPC: H05K1/11 ,  H01L21/768 ,  H05K1/02 ,  H05K3/40

    CPC classification number: H05K1/115 ,  H01L21/76871 ,  H05K1/024 ,  H05K3/40 ,  H05K2201/09145 ,  H05K2201/09218 ,  H05K2201/095 ,  H05K2203/0502

    Abstract: A circuit structure includes a low-density conductive structure, a high-density conductive structure and a plurality of traces. The high-density conductive structure is disposed over the low-density conductive structure, and defines an opening extending from a top surface of the high-density conductive structure to a bottom surface of the high-density conductive structure. The opening exposes a first pad of the low-density conductive structure and a second pad of the low-density conductive structure. The second pad is spaced apart from the first pad. The traces extend from the top surface of the high-density conductive structure into the opening. The traces include a first trace connecting to the first pad of the low-density conductive structure and a second trace connecting to the second pad of the low-density conductive structure.

    WIRING BOARD, ELECTRONIC COMPONENT STORAGE PACKAGE, AND ELECTRONIC DEVICE
    9.
    发明公开
    WIRING BOARD, ELECTRONIC COMPONENT STORAGE PACKAGE, AND ELECTRONIC DEVICE 审中-公开

    公开(公告)号：US20240292530A1

    公开(公告)日：2024-08-29

    申请号：US18572653

    申请日：2022-06-17

    Applicant: KYOCERA Corporation

    Inventor： Shigenori TAKAYA ,  Tomoya KON ,  Kyosuke FUKUDA

    IPC: H05K1/02 ,  H05K1/11

    CPC classification number: H05K1/0298 ,  H05K1/0245 ,  H05K1/115 ,  H05K2201/09727

    Abstract: A wiring board includes: a base including first and second faces and a side face between the first and second faces; a signal electrode on the first face; first and second recesses located in the side face and extending to the first face; and first and second ground conductors on an inner surface of the first and second recesses, respectively. When viewed in a first direction perpendicular to the first face, an outline of the base includes at least one circular arc; when viewed in the first direction, the signal electrode extends from a center value region on the first face toward the circular arc and is shifted from a normal line passing through a center point of the circular arc; and when viewed in the first direction, the first and second recesses overlap the circular arc, and the first recess is on one side of the signal electrode, and the second recess is on the other side of the signal electrode.

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