公开(公告)号：US09006058B1

公开(公告)日：2015-04-14

申请号：US14150489

申请日：2014-01-08

Applicant: United Microelectronics Corp.

Inventor： Tung-Ming Chen ,  Yu-Chun Huang ,  Shin-Chuan Huang ,  Chia-Jong Liu ,  I-Fang Huang

IPC: H01L21/8238 ,  H01L29/66

CPC classification number: H01L21/823814 ,  H01L21/8238 ,  H01L21/823807 ,  H01L21/823864 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848

Abstract: A method for fabricating a semiconductor device is described. A semiconductor substrate is provided, wherein the substrate has a first area and a second area. A first gate structure and a second gate structure are formed over the substrate in the first area and the substrate in the second area, respectively. A first spacer is framed on the sidewall of each gate structure. At least one etching process including at least one wet etching process is performed. The first spacer is removed. A second spacer is formed on the sidewall of each gate structure. A mask layer is formed in the second area. Ion implantation is formed using the mask layer, the first gate structure and the second spacer as a mask to form S/D extensions in the substrate beside the first gate structure in the first area. The mask layer is then removed.

Abstract translation: 对半导体装置的制造方法进行说明。 提供一种半导体衬底，其中衬底具有第一区域和第二区域。 第一栅极结构和第二栅极结构分别在第一区域和第二区域中的衬底上形成在衬底上。 第一间隔件框架在每个栅极结构的侧壁上。 执行包括至少一个湿蚀刻工艺的至少一个蚀刻工艺。 第一个垫片被去除。 在每个栅极结构的侧壁上形成第二间隔物。 在第二区域中形成掩模层。 使用掩模层，第一栅极结构和第二间隔物作为掩模形成离子注入，以在第一区域中的第一栅极结构旁边的衬底中形成S / D延伸。 然后去除掩模层。

公开(公告)号：US09105651B2

公开(公告)日：2015-08-11

申请号：US13940103

申请日：2013-07-11

Applicant: United Microelectronics Corp.

Inventor： Tsung-Hung Chang ,  Yi-Wei Chen ,  I-Fang Huang

IPC: H01L21/00 ,  H01L29/66

CPC classification number: H01L29/66477 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823443 ,  H01L21/823468 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7843 ,  H01L29/7847 ,  H01L29/7848

Abstract: Provided is a method of fabricating a MOS device including the following steps. A gate structure is formed on a substrate and a first spacer is formed at a sidewall of the gate structure. A first implant process is performed to form source and drain extension regions in the substrate. A spacer material layer is formed on the gate structure, the first spacer and the substrate. A treatment process is performed so that stress from the spacer material layer is applied onto and memorized in a channel between two source and drain extension regions. An anisotropic process is performed to remove a portion of the spacer material so that a second spacer is formed. A second implant process is performed to form source and drain regions in the substrate.

Abstract translation: 提供了一种制造MOS器件的方法，包括以下步骤。 栅极结构形成在衬底上，并且第一间隔物形成在栅极结构的侧壁处。 执行第一注入工艺以在衬底中形成源极和漏极延伸区域。 在栅极结构，第一间隔物和衬底上形成间隔物层。 执行处理过程，使得来自间隔物材料层的应力施加到并存储在两个源极和漏极延伸区域之间的沟道中。 执行各向异性处理以去除间隔物材料的一部分，从而形成第二间隔物。 执行第二注入工艺以在衬底中形成源区和漏区。

公开(公告)号：US20150017777A1

公开(公告)日：2015-01-15

申请号：US13940103

申请日：2013-07-11

Applicant: United Microelectronics Corp.

Inventor： Tsung-Hung Chang ,  Yi-Wei Chen ,  I-Fang Huang

IPC: H01L29/66

CPC classification number: H01L29/66477 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823443 ,  H01L21/823468 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7843 ,  H01L29/7847 ,  H01L29/7848

Abstract: Provided is a method of fabricating a MOS device including the following steps. A gate structure is formed on a substrate and a first spacer is formed at a sidewall of the gate structure. A first implant process is performed to form source and drain extension regions in the substrate. A spacer material layer is formed on the gate structure, the first spacer and the substrate. A treatment process is performed so that stress form the spacer material layer is applied onto and memorized in a channel between two source and drain extension regions. An anisotropic process is performed to remove a portion of the spacer material so that a second spacer is formed. A second implant process is performed to form source and drain regions in the substrate.

Abstract translation: 提供了一种制造MOS器件的方法，包括以下步骤。 栅极结构形成在衬底上，并且第一间隔物形成在栅极结构的侧壁处。 执行第一注入工艺以在衬底中形成源极和漏极延伸区域。 在栅极结构，第一间隔物和衬底上形成间隔物层。 执行处理过程，使得形成间隔物材料层的应力被施加到并存储在两个源极和漏极延伸区域之间的沟道中。 执行各向异性处理以去除间隔物材料的一部分，从而形成第二间隔物。 执行第二注入工艺以在衬底中形成源区和漏区。