公开(公告)号：US12132096B2

公开(公告)日：2024-10-29

申请号：US18360110

申请日：2023-07-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Xusheng Wu ,  Chang-Miao Liu ,  Huiling Shang

IPC分类号： H01L21/82 ,  H01L21/265 ,  H01L21/28 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/66545 ,  H01L21/26586 ,  H01L21/28008 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823468 ,  H01L27/0886 ,  H01L29/4236 ,  H01L29/49 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/785

摘要： A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a gate stack over the substrate. The semiconductor device structure also includes a spacer element over a sidewall of the gate stack. The spacer element is doped with a dopant, and the dopant reduces a dielectric constant of the spacer element. The spacer element has a first atomic concentration of the dopant near an inner surface of the spacer element adjacent to the gate stack. The spacer element has a second atomic concentration of the dopant near an outer surface of the spacer element. The first atomic concentration of the dopant is different than the second atomic concentration of the dopant.

公开(公告)号：US12125897B2

公开(公告)日：2024-10-22

申请号：US18343322

申请日：2023-06-28

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yi-Lun Chen ,  Chao-Hsien Huang ,  Li-Te Lin ,  Chun-Hsiung Lin

IPC分类号： H01L29/66 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/51 ,  H01L29/78

CPC分类号： H01L29/6653 ,  H01L21/823468 ,  H01L21/823864 ,  H01L29/515 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66795 ,  H01L29/785

摘要： A method includes forming a gate stack over a semiconductor region, and forming a first gate spacer on a sidewall of the gate stack. The first gate spacer includes an inner sidewall spacer, and a dummy spacer portion on an outer side of the inner sidewall spacer. The method further includes removing the dummy spacer portion to form a trench, and forming a dielectric layer to seal a portion of the trench as an air gap. The air gap and the inner sidewall spacer in combination form a second gate spacer. A source/drain region is formed to have a portion on an outer side of the second gate spacer.

公开(公告)号：US20240347616A1

公开(公告)日：2024-10-17

申请号：US18661969

申请日：2024-05-13

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yi-Hsiu Liu ,  Feng-Cheng Yang ,  Tsung-Lin Lee ,  Wei-Yang Lee ,  Yen-Ming Chen ,  Yen-Ting Chen

IPC分类号： H01L29/51 ,  H01L21/311 ,  H01L27/088 ,  H01L29/66

CPC分类号： H01L29/515 ,  H01L21/311 ,  H01L27/0886 ,  H01L29/6653

摘要： A semiconductor structure includes a first device and a second device. The first device includes: a first gate structure formed over an active region and a first air spacer disposed adjacent to the first gate structure. The second device includes: a second gate structure formed over an isolation structure and a second air spacer disposed adjacent to the second gate structure. The first air spacer and the second air spacer have different sizes.

公开(公告)号：US20240321984A1

公开(公告)日：2024-09-26

申请号：US18734345

申请日：2024-06-05

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chun-Ting CHOU

IPC分类号： H01L29/417 ,  H01L29/66

CPC分类号： H01L29/41775 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656

摘要： A method includes forming a gate dielectric layer and a dummy gate layer; forming a mask over the dummy gate layer; patterning the gate dielectric layer and the dummy gate layer to form a dummy gate structure, the dummy gate structure including a remaining portion of the gate dielectric layer and a remaining portion of the dummy gate layer; epitaxially growing a first spacer layer on the dummy gate structure and the substrate, in which the first spacer layer has a higher growth rate on the exposed surfaces of the dummy gate structure and the substrate than on exposed surfaces of the mask; doping the first spacer layer to form a doped spacer layer having a different lattice constant than the substrate; depositing a second spacer layer over the doped spacer layer; and etching the second spacer layer and the doped spacer layer to form a gate spacer.

公开(公告)号：US20240321881A1

公开(公告)日：2024-09-26

申请号：US18187989

申请日：2023-03-22

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Yu-Xuan HUANG ,  Chi-Yu LU ,  Shang-Wen CHANG ,  Guan-Lin CHEN ,  Cheng-Chi CHUANG

IPC分类号： H01L27/092 ,  H01L23/528 ,  H01L29/40 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L27/092 ,  H01L23/5286 ,  H01L29/401 ,  H01L29/6653 ,  H01L29/66666 ,  H01L29/7827

摘要： A method includes forming an epitaxial stack including a first sacrificial layer, a channel layer, and a second sacrificial layer over a semiconductor substrate; patterning the epitaxial stack into a fin structure such that opposite first ends of the channel layer are exposed; recessing the opposite first ends of the channel layer; forming first dummy spacers on the recessed opposite first ends of the channel layer; forming an isolation structure in the fin structure; recessing a top surface of the isolation structure to a position lower than a bottom surface of the channel layer, such that opposite second ends of the channel layer are exposed; recessing the opposite second ends of the channel layer; forming second dummy spacers on the recessed opposite second ends of the channel layer; and replacing the first dummy spacers and the second dummy spacers with a metal gate structure.

公开(公告)号：US12068398B2

公开(公告)日：2024-08-20

申请号：US18306769

申请日：2023-04-25

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hsu Ming Hsiao ,  Ming-Jhe Sie ,  Hsiu-Hao Tsao ,  Hong Pin Lin ,  Che-fu Chen ,  An Chyi Wei ,  Yi-Jen Chen

IPC分类号： H01L29/66 ,  H01L21/3105 ,  H01L21/3213 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/165 ,  H01L29/49 ,  H01L29/78

CPC分类号： H01L29/6681 ,  H01L21/31055 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656

摘要： A method, for making a semiconductor device, includes forming a first fin over a substrate. The method includes forming a dummy gate stack on the first fin. The method includes forming a first gate spacer along a side of the dummy gate stack. The first gate spacer includes a first dielectric material. The method includes forming a second gate spacer along a side of the first gate spacer. The second gate spacer includes a semiconductor material. The method includes forming a source/drain region in the first fin adjacent the second gate spacer. The method includes removing at least a portion of the second gate spacer to form a void extending between the first gate spacer and the source/drain region.

公开(公告)号：US12062709B2

公开(公告)日：2024-08-13

申请号：US18326115

申请日：2023-05-31

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Wei-Ting Chien ,  Liang-Yin Chen ,  Yi-Hsiu Liu ,  Tsung-Lin Lee ,  Huicheng Chang

IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L21/311 ,  H01L21/764 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49 ,  H01L29/51 ,  H01L29/78

CPC分类号： H01L29/6656 ,  H01L21/764 ,  H01L21/823468 ,  H01L21/823864 ,  H01L29/0649 ,  H01L29/42324 ,  H01L29/4991 ,  H01L29/515 ,  H01L29/6653 ,  H01L29/66537 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/66795 ,  H01L29/66825 ,  H01L29/785 ,  H01L21/02112 ,  H01L21/02115 ,  H01L21/02205 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31111 ,  H01L21/31116

摘要： A semiconductor device and a method of forming the same are provided. The method includes forming a sacrificial gate structure over an active region. A first spacer layer is formed along sidewalls and a top surface of the sacrificial gate structure. A first protection layer is formed over the first spacer layer. A second spacer layer is formed over the first protection layer. A third spacer layer is formed over the second spacer layer. The sacrificial gate structure is replaced with a replacement gate structure. The second spacer layer is removed to form an air gap between the first protection layer and the third spacer layer.

公开(公告)号：US20240266411A1

公开(公告)日：2024-08-08

申请号：US18631808

申请日：2024-04-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Sheng-Jier YANG

IPC分类号： H01L29/417 ,  H01L27/088 ,  H01L29/06 ,  H01L29/40 ,  H01L29/423 ,  H01L29/45 ,  H01L29/66 ,  H01L29/786

CPC分类号： H01L29/41775 ,  H01L27/088 ,  H01L29/0665 ,  H01L29/401 ,  H01L29/42392 ,  H01L29/458 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/78696

摘要： In a method of manufacturing a semiconductor device, a fin structure in which first semiconductor layers and second semiconductor layers are alternately stacked is formed, a sacrificial gate structure is formed over the fin structure, a source/drain region of the fin structure, which is not covered by the sacrificial gate structure, is etched thereby forming a source/drain space, a stressor layer is formed in the source/drain space, a metal gate structure including part of the second semiconductor layer as channel regions is formed by a gate replacement process, after the metal gate structure is formed, the stressor layer is at least partially removed, and a source/drain contact comprising metal or a metallic material is formed in the source/drain space from which the stressor layer is at least partially removed.

公开(公告)号：US20240250152A1

公开(公告)日：2024-07-25

申请号：US18623390

申请日：2024-04-01

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Xusheng Wu ,  Chang-Miao Liu ,  Huiling SHANG

IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L21/225 ,  H01L21/265 ,  H01L21/762 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/786

CPC分类号： H01L29/66742 ,  H01L21/7624 ,  H01L29/0847 ,  H01L29/42392 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66787 ,  H01L29/78603 ,  H01L29/78696 ,  H01L21/02236 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/2253 ,  H01L21/26533 ,  H01L29/0673

摘要： A semiconductor structure includes a substrate, an oxide layer disposed over the substrate, a stack of semiconductor layers disposed over the oxide layer, and an epitaxial source/drain (S/D) feature disposed adjacent to the stack of semiconductor layers. A portion of the epitaxial S/D feature is horizontally surrounded by the oxide layer.

公开(公告)号：US12034061B2

公开(公告)日：2024-07-09

申请号：US17688236

申请日：2022-03-07

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chien-Wei Lee ,  Yen-Ru Lee ,  Hsueh-Chang Sung ,  Yee-Chia Yeo

IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L29/78

CPC分类号： H01L29/6681 ,  H01L21/02054 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/7848

摘要： A method for forming a semiconductor structure includes forming a gate structure over a substrate. The method also includes forming a spacer on a sidewall of the gate structure. The method also includes forming a source/drain recess beside the spacer. The method also includes treating the source/drain recess and partially removing the spacers in a first cleaning process. The method also includes treating the source/drain recess with a plasma process after performing the first cleaning process. The method also includes treating the source/drain recess in a second cleaning process after treating the source/drain recess with the plasma process. The method also includes forming a source/drain structure in the source/drain recess after performing the second cleaning process.