公开(公告)号：US20240168084A1

公开(公告)日：2024-05-23

申请号：US18085560

申请日：2022-12-20

Applicant: United Microelectronics Corp.

Inventor： Jih-Shun Chiang ,  Wen-Chun Chang ,  Wen-Hsiung Ko ,  Sung-Nien Kuo ,  Kuan-Cheng Su

IPC: G01R31/28 ,  H01L23/34 ,  H01L23/528 ,  H01L23/532

CPC classification number: G01R31/2875 ,  H01L23/345 ,  H01L23/5283 ,  H01L23/53223 ,  H01L23/5329

Abstract: A semiconductor structure is provided. The semiconductor structure includes at least one metal gate structure and a device to be tested. The metal gate structure is disposed on a substrate. The device to be tested is disposed on the metal gate structure and electrically separated from the metal gate structure. The device to be tested is heated by a heat generated when the metal gate structure is applied with a voltage.

公开(公告)号：US20250031458A1

公开(公告)日：2025-01-23

申请号：US18242502

申请日：2023-09-05

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ming-Te Lin ,  Wen-Chun Chang ,  Sung-Nien Kuo ,  Tzu-Chun Chen ,  Kuan-Cheng Su

IPC: H01L27/02 ,  H01L23/522

Abstract: A semiconductor structure is provided in the present invention, including a substrate, a deep N-well formed in the substrate, a first well formed in the deep N-well, a first gate formed on the first well, a first source and a first drain formed respectively at two sides of the first gate in the first well, a first doped region formed in the first well, and a metal interconnect electrically connected with the first source and the first doped region, wherein an area of the deep N-well multiplied by a first parameter is a first factor, an area of the first gate multiplied by a second parameter is a second factor, and an area of the metal interconnect divided by a sum of the first factor and the second factor is less than a specification value.