公开(公告)号：US20240222204A1

公开(公告)日：2024-07-04

申请号：US18163293

申请日：2023-02-02

Applicant: United Microelectronics Corp.

Inventor： Yu-Yuan Huang ,  Kai-Kuang Ho ,  Yi-Feng Hsu

IPC: H01L21/66 ,  H01L23/48 ,  H01L29/20 ,  H01L29/778

CPC classification number: H01L22/32 ,  H01L23/481 ,  H01L29/2003 ,  H01L29/7786

Abstract: Provided is a semiconductor device including a substrate, a semiconductor layer, a source electrode, a first metal layer, a backside via hole, and a backside metal layer. The substrate has a frontside and a backside opposite to each other. The semiconductor layer is disposed on the frontside of the substrate. The source electrode is disposed on the semiconductor layer. The first metal layer is disposed on the source electrode. The backside via hole extends from the backside of the substrate to a bottom surface of the first metal layer. The backside via hole is laterally separated from the source electrode by a non-zero distance. The backside metal layer is disposed on the backside of the substrate and extending to cover a surface of the backside via hole.

公开(公告)号：US11495510B2

公开(公告)日：2022-11-08

申请号：US16780639

申请日：2020-02-03

Applicant: United Microelectronics Corp.

Inventor： Yu-Yuan Huang ,  Tsung-Kai Yu ,  Chen-Hsiao Wang ,  Kai-Kuang Ho ,  Kuang-Hui Tang

IPC: H01L23/31 ,  H01L23/58 ,  H01L21/56 ,  H01L23/00

Abstract: A semiconductor device package structure includes a substrate. The substrate has a circuit structure formed in a die region. The die region is defined by a plurality of scribe lines configured on the substrate. A seal ring is disposed in the substrate and located at a periphery region of the die region, and surrounds at least a portion of the circuit structure. A trench ring is disposed in the substrate between the seal ring and the scribe lines. A packaging passivation cap layer covers over the circuit structure and the seal ring, and covers at least the trench ring.