公开(公告)号：US10580823B2

公开(公告)日：2020-03-03

申请号：US15586102

申请日：2017-05-03

申请人： United Microelectronics Corp.

发明人： Sheng Zhang ,  Wen-Bo Ding ,  Zhi-Rui Sheng ,  Chien-En Hsu ,  Chien-Kee Pang

IPC分类号： H01L27/146 ,  H01L23/00

摘要： A wafer level packaging method includes the following steps. A first wafer is bonded over a second wafer. A first grinding process on the first wafer is performed, to remove an upper chamfered edge of the first wafer and reduce a thickness of the first wafer. A trimming process is performed on the first wafer, to remove a lower chamfered edge of the first wafer to form a trimmed first wafer. A second grinding process is performed on the trimmed first wafer, to reduce a thickness of the trimmed first wafer.

公开(公告)号：US20180323227A1

公开(公告)日：2018-11-08

申请号：US15586102

申请日：2017-05-03

申请人： United Microelectronics Corp.

发明人： Sheng Zhang ,  Wen-Bo Ding ,  Zhi-Rui Sheng ,  Chien-En Hsu ,  Chien-Kee Pang

IPC分类号： H01L27/146 ,  H01L21/306 ,  H01L23/00

摘要： A wafer level packaging method includes the following steps. A first wafer is bonded over a second wafer. A first grinding process on the first wafer is performed, to remove an upper chamfered edge of the first wafer and reduce a thickness of the first wafer. A trimming process is performed on the first wafer, to remove a lower chamfered edge of the first wafer to form a trimmed first wafer. A second grinding process is performed on the trimmed first wafer, to reduce a thickness of the trimmed first wafer.