公开(公告)号：US08828827B2

公开(公告)日：2014-09-09

申请号：US14010491

申请日：2013-08-26

Applicant: United Microelectronics Corporation

Inventor： Chun-Yao Lee ,  Chin-Lung Chen ,  Wei-Chun Chang ,  Hung-Te Lin ,  Han-Min Huang

IPC: H01L29/66 ,  H01L29/08 ,  H01L29/78 ,  H01L29/423

CPC classification number: H01L29/66477 ,  H01L29/0878 ,  H01L29/42368 ,  H01L29/66681 ,  H01L29/7816

Abstract: A manufacturing method of an anti punch-through leakage current MOS transistor is provided. A high voltage deep first type well region and a first type light doping region are formed in a second type substrate. A mask with a dopant implanting opening is formed on the second type substrate. An anti punch-through leakage current structure is formed by implanting the first type dopant through the dopant implanting opening. A doping concentration of the first type dopant of the high voltage deep first type well region is less than that of the anti punch-through leakage current structure and greater than that of the high voltage deep first type well region. A second type body is formed by implanting a second type dopant through the dopant implanting opening. A gate structure is formed on the second type substrate.

Abstract translation: 提供一种抗穿通漏电流MOS晶体管的制造方法。 在第二类型的衬底中形成高电压深第一类型阱区和第一类型掺杂区。 具有掺杂剂注入口的掩模形成在第二类型衬底上。 通过在掺杂剂注入口中注入第一种类型的掺杂剂形成抗穿透漏电流结构。 高压深度第一类型阱区域的第一种掺杂剂的掺杂浓度小于抗穿透漏电流结构的掺杂浓度，并且大于高电压深度第一类型阱区域的掺杂浓度。 通过在掺杂剂注入口中注入第二种掺杂剂形成第二类型体。 栅极结构形成在第二类型基板上。