公开(公告)号：US10862463B1

公开(公告)日：2020-12-08

申请号：US16848864

申请日：2020-04-15

Applicant: University of Electronic Science and Technology of China

Inventor： Zekun Zhou ,  Jianwen Cao ,  Zhuo Wang ,  He Tang ,  Bo Zhang

IPC: H03K19/0185 ,  H03K3/356 ,  H03K3/012 ,  H03K5/134

Abstract: A level shifter includes a power supply rail conversion block, an RS latch and a digital detection block. The power supply rail conversion block comprises a first NLDMOS transistor, a second NLDMOS transistor, a first PLDMOS transistor, a second PLDMOS transistor, a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, and a first inverter. A gate of the first NLDMOS transistor is connected to an input of the first inverter, a drain of the first NLDMOS transistor is connected to a drain of the first PLDMOS transistor; a source of the first NLDMOS transistor and a source of the second NLDMOS are connected to a referenced ground of an LV power supply rail. The digital detection block comprises a second inverter, a third inverter, a first delay chain, a second delay chain, a first NAND gate and a second NAND gate.