公开(公告)号：US11335785B2

公开(公告)日：2022-05-17

申请号：US17126069

申请日：2020-12-18

Applicant: University of Electronic Science and Technology of China

Inventor： Ping Li ,  Yongbo Liao ,  Chenxi Peng ,  Yaosen Li ,  Ruihong Nie ,  Ke Feng ,  Xianghe Zeng ,  Ruifeng Tang ,  Jiarui Zou ,  Zhaoxi Hu ,  Fan Lin

IPC: H01L29/02 ,  H01L29/417 ,  H01L29/16 ,  H01L29/20 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H02M7/537

Abstract: A MOS integrated circuit basic unit includes: a drain semiconductor region; a lightly doped drain region; a channel semiconductor region; a source semiconductor region; a source electrode; a gate electrode; a gate dielectric layer; and a drain electrode. The drain semiconductor region is the bottom of the basic unit. The gate electrode has a ring structure, which surrounds the channel semiconductor region, the source semiconductor region and the lightly doped drain region. The upper surface of the gate electrode is aligned to the upper surface of the source semiconductor region; and a bottom surface of the gate electrode is lower than an interface of the lightly doped drain region and the drain semiconductor region. The gate dielectric layer is disposed between the gate electrode and the adjacent functional layer. The drain semiconductor region is connected to the drain electrode of the basic unit.

公开(公告)号：US11621349B2

公开(公告)日：2023-04-04

申请号：US17367573

申请日：2021-07-05

Applicant: University of Electronic Science and Technology of China

Inventor： Ping Li ,  Yongbo Liao ,  Xianghe Zeng ,  Yaosen Li ,  Ke Feng ,  Chenxi Peng ,  Zhaoxi Hu ,  Fan Lin ,  Xuanlin Xiong ,  Tao He

IPC: H01L29/78 ,  H01L29/417 ,  H01L29/10

Abstract: A nano-wall integrated circuit structure with high integration density is disclosed, which relates to the fields of microelectronic technology and integrated circuits (IC). Based on the different device physical principles with MOSFETs in traditional ICs, the nano-wall integrated circuit unit structure (Nano-Wall FET, referred to as NWaFET) with high integration density can improve the integration of the IC, significantly shorten the channel length, improve the flexibility of the device channel width-to-length ratio adjustment, and save chip area.