公开(公告)号：US11621349B2

公开(公告)日：2023-04-04

申请号：US17367573

申请日：2021-07-05

Applicant: University of Electronic Science and Technology of China

Inventor： Ping Li ,  Yongbo Liao ,  Xianghe Zeng ,  Yaosen Li ,  Ke Feng ,  Chenxi Peng ,  Zhaoxi Hu ,  Fan Lin ,  Xuanlin Xiong ,  Tao He

IPC: H01L29/78 ,  H01L29/417 ,  H01L29/10

Abstract: A nano-wall integrated circuit structure with high integration density is disclosed, which relates to the fields of microelectronic technology and integrated circuits (IC). Based on the different device physical principles with MOSFETs in traditional ICs, the nano-wall integrated circuit unit structure (Nano-Wall FET, referred to as NWaFET) with high integration density can improve the integration of the IC, significantly shorten the channel length, improve the flexibility of the device channel width-to-length ratio adjustment, and save chip area.