-
公开(公告)号：US20050279382A1
公开(公告)日：2005-12-22
申请号：US11140463
申请日：2005-05-27
申请人： Uwe Höckele , Andrew Johnson , Hans-Georg Kessler , Orest Nowik , Kai-Alexander Schreiber , Mark Sistern , Hubert Winzig
发明人： Uwe Höckele , Andrew Johnson , Hans-Georg Kessler , Orest Nowik , Kai-Alexander Schreiber , Mark Sistern , Hubert Winzig
IPC分类号： B08B6/00 , B08B7/00 , C23C20060101 , C23C16/44 , C23F4/00
CPC分类号： H01J37/32862 , B08B7/00 , B08B7/0035 , C23C16/4405
摘要： A method for cleaning silicon-containing deposits in process chamber is described. Fluorine-containing compounds and additional compounds are used for the cleaning. The deposits are removed using a cleaning gas contains fluorine-containing compounds, at least 50% of which have more than one carbon atom and are C4F8 or C2F6 molecules, and additional compounds, at least 50% of which have at least one oxygen atom and at least 50% are N2O molecules. A pressure in the chamber is between 266 Pa and 665 Pa. The method permits economical and environmentally friendly cleaning of the process chamber.
摘要翻译： 描述了一种在处理室中清洗含硅沉积物的方法。 含氟化合物和其他化合物用于清洗。 使用包含含氟化合物的清洁气体除去沉积物，其中至少50％具有多于一个碳原子并且为C 4 N 8或C C 其中至少有50％具有至少一个氧原子和至少50％的分子是N 2 O分子 。 室内的压力在266Pa和665Pa之间。该方法允许对处理室进行经济和环境友好的清洁。
-
公开(公告)号：US20080179669A1
公开(公告)日：2008-07-31
申请号：US11680320
申请日：2007-02-28
IPC分类号： H01L29/78 , H01L21/3205 , H01L23/52
CPC分类号： H01L21/76832 , H01L21/76829 , H01L21/76837 , H01L23/5329 , H01L23/53295 , H01L29/41741 , H01L29/7803 , H01L29/7813 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit including a semiconductor arrangement, a power semiconductor component and an associated production method is disclosed. One embodiment includes a carrier substrate, a first interconnect layer, formed on the carrier substrate and has at least one cutout, an insulating filling layer, formed on the first interconnect layer and the carrier substrate and fills at least one cutout, an SiON layer, formed on the filling layer, and a second interconnect layer, formed over the SiON layer.
摘要翻译： 公开了一种包括半导体装置，功率半导体元件和相关制造方法的集成电路。 一个实施例包括形成在载体基板上并具有至少一个切口的绝缘填充层的载体基板，第一互连层，形成在第一互连层和载体基板上并填充至少一个切口，SiON层， 形成在所述填充层上，以及形成在所述SiON层上的第二互连层。
-
公开(公告)号：US07834427B2
公开(公告)日：2010-11-16
申请号：US11680320
申请日：2007-02-28
CPC分类号： H01L21/76832 , H01L21/76829 , H01L21/76837 , H01L23/5329 , H01L23/53295 , H01L29/41741 , H01L29/7803 , H01L29/7813 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit including a semiconductor arrangement, a power semiconductor component and an associated production method is disclosed. One embodiment includes a carrier substrate, a first interconnect layer, formed on the carrier substrate and has at least one cutout, an insulating filling layer, formed on the first interconnect layer and the carrier substrate and fills at least one cutout, an SiON layer, formed on the filling layer, and a second interconnect layer, formed over the SiON layer.
摘要翻译： 公开了一种包括半导体装置，功率半导体元件和相关制造方法的集成电路。 一个实施例包括形成在载体基板上并具有至少一个切口的绝缘填充层的载体基板，第一互连层，形成在第一互连层和载体基板上并填充至少一个切口，SiON层， 形成在所述填充层上，以及形成在所述SiON层上的第二互连层。
-
-
搜索结果
3 条记录 (耗时 0.028 秒)
