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公开(公告)号：US4327379A
公开(公告)日：1982-04-27
申请号：US139501
申请日：1980-04-11
摘要： A circuit to encode image data. The circuit receives image data in four bit nibbles which are either all-zero nibbles or terminating nibbles containing at least one non-zero bit. The circuit output is a series of code words, each a multiple of four bits and up to twenty-four bits long, packed into eight bit output words. Each code word contains a first part containing a run length specifying the number of received all-zero nibbles and a second part specifying the bit pattern of the terminating nibble. The circuit uses PROMs for the look-up and control elements and a pipeline of registers to allow high speed operation.
摘要翻译： 用于对图像数据进行编码的电路。 该电路接收四位半字节中的图像数据，它们是包含至少一个非零位的全零半字节或终止半字节。 电路输出是一系列代码字，每一个是四位数，最多二十四位，多达八位输出字。 每个代码字包含包含指定接收的全零半字节的数量的游程长度的第一部分和指定终止半字节的位模式的第二部分。 该电路使用PROM来查找和控制元件以及一个寄存器流水线，以允许高速运行。
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公开(公告)号：US4425582A
公开(公告)日：1984-01-10
申请号：US293815
申请日：1981-08-17
申请人： Vinod K. Kadakia , Glen D. Jones
发明人： Vinod K. Kadakia , Glen D. Jones
IPC分类号： G06T9/00 , H04N1/41 , H04N1/417 , H03K13/243
CPC分类号： G06T9/004 , G06T9/005 , H04N1/4105 , H04N1/417
摘要： A predictor bit pattern comprising selected bits of the current and previous raster scan lines and a method of predicting a plurality of bits per clock are disposed. Generally, a predictor is used prior to the encoding of data to increase the compression. The current bit in a bit stream is compared to the predicted value and a one is output when the two values are not equal. An efficient predictor will reduce the number of ones in a bit stream, which increases the zero run lengths and increases the efficiency of a run length encoding system. The described bit pattern contains bits close to the current bit to efficiently predict text data, bits distant from the current bit to efficiently predict halftone data, and ignores a plurality of intermediate bits to reduce hardware costs. A two step process is also described to allow a plurality of bits to be predicted in parallel. A circuit for performing this process comprises a buffer for storing the previous and current line data, two registers for holding the previous and current line prediction data patterns and two PROMs for performing the two step prediction.
摘要翻译： 布置包括当前和之前的光栅扫描线的选定位的预测器位模式以及每个时钟预测多个位的方法。 通常，在数据编码之前使用预测器来增加压缩。 将比特流中的当前比特与预测值进行比较，并且当两个值不相等时输出一个。 有效的预测器将减少位流中的数量，这增加了零运行长度，并提高了运行长度编码系统的效率。 所描述的位模式包含靠近当前位的位以有效地预测文本数据，远离当前位的位以有效地预测半色调数据，并忽略多个中间位以降低硬件成本。 还描述了两步处理以允许并行预测多个位。 用于执行该处理的电路包括用于存储先前和当前行数据的缓冲器，用于保持先前和当前行预测数据模式的两个寄存器和用于执行两步预测的两个PROM。
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公开(公告)号：US4029373A
公开(公告)日：1977-06-14
申请号：US385356
申请日：1973-08-03
申请人： Glen D. Jones , Michael J. Raffetto
发明人： Glen D. Jones , Michael J. Raffetto
CPC分类号： H05K7/1439
摘要： Improved apparatus for wiring through a wall of a sealed enclosure is disclosed. A printed circuit board is mounted on and extends through a slot in the wall, said board etched so that a plurality of conducting lines are provided from inside to outside the enclosure. Standard printed circuit board connectors are mounted on and soldered to the board providing convenient means for the attachment of cables to the board. Finally, the slot space between the printed circuit board and the wall is sealed with a rubber grommet to complete the sealing of the enclosure.
摘要翻译： 公开了用于通过密封外壳的壁布线的改进的装置。 印刷电路板安装在壁上并延伸通过壁中的狭槽，所述板被蚀刻，使得从壳体的内部到外部提供多条导电线。 标准印刷电路板连接器安装在板上并焊接到板上，提供用于将电缆连接到电路板的便利装置。 最后，用橡胶垫圈密封印刷电路板和壁之间的槽空间，以完成外壳的密封。
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