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    Determining a message residue
    1.
    发明授权
    Determining a message residue 有权
    确定消息残差

    公开(公告)号：US07886214B2

    公开(公告)日：2011-02-08

    申请号：US11959142

    申请日：2007-12-18

    申请人： Vinodh Gopal ,  Michael Kounavis ,  Gilbert Wolrich

    发明人： Vinodh Gopal ,  Michael Kounavis ,  Gilbert Wolrich

    IPC分类号： H03M13/00

    CPC分类号： G06F7/724 ,  H03M13/09 ,  H03M13/158

    摘要： A description of techniques of determining a modular remainder with respect to a polynomial of a message comprised of a series of segments. An implementation can include repeatedly accessing a strict subset of the segments and transforming the strict subset of segments to into a smaller set of segments that are equivalent to the strict subset of the segments with respect to the modular remainder. The implementation can also include determining the modular remainder based on a set of segments output by the repeatedly accessing and transforming and storing the determined modular remainder.

    摘要翻译： 关于由一系列段组成的消息的多项式确定模块余数的技术的描述。 实现可以包括重复地访问段的严格子集并将段的严格子集转换成相对于模块余数等同于段的严格子集的较小的段集合。 实现还可以包括基于通过重复访问和变换并存储所确定的模块余数而输出的一组段确定模块余数。

    DETERMINING A MESSAGE RESIDUE
    2.
    发明申请
    DETERMINING A MESSAGE RESIDUE 有权
    确定留言信息

    公开(公告)号：US20090157784A1

    公开(公告)日：2009-06-18

    申请号：US11959142

    申请日：2007-12-18

    申请人： Vinodh Gopal ,  Michael Kounavis ,  Gilbert Wolrich

    发明人： Vinodh Gopal ,  Michael Kounavis ,  Gilbert Wolrich

    IPC分类号： G06F7/72 ,  G06F17/14

    CPC分类号： G06F7/724 ,  H03M13/09 ,  H03M13/158

    摘要： A description of techniques of determining a modular remainder with respect to a polynomial of a message comprised of a series of segments. An implementation can include repeatedly accessing a strict subset of the segments and transforming the strict subset of segments to into a smaller set of segments that are equivalent to the strict subset of the segments with respect to the modular remainder. The implementation can also include determining the modular remainder based on a set of segments output by the repeatedly accessing and transforming and storing the determined modular remainder.

    摘要翻译： 关于由一系列段组成的消息的多项式确定模块余数的技术的描述。 实现可以包括重复地访问段的严格子集并将段的严格子集转换成相对于模块余数等同于段的严格子集的较小的段集合。 实现还可以包括基于通过重复访问和变换并存储所确定的模块余数而输出的一组段确定模块余数。

    APPARATUS AND METHOD FOR EFFICIENTLY EXECUTING BOOLEAN FUNCTIONS
    3.
    发明申请
    APPARATUS AND METHOD FOR EFFICIENTLY EXECUTING BOOLEAN FUNCTIONS 审中-公开
    有效执行布尔函数的装置和方法

    公开(公告)号：US20140095845A1

    公开(公告)日：2014-04-03

    申请号：US13631807

    申请日：2012-09-28

    申请人： Vinodh Gopal ,  Wajdi Feghali ,  Gilbert Wolrich ,  Kirk Yap

    发明人： Vinodh Gopal ,  Wajdi Feghali ,  Gilbert Wolrich ,  Kirk Yap

    IPC分类号： G06F9/30

    摘要： An apparatus and method are described for performing efficient Boolean operations in a pipelined processor which, in one embodiment, does not natively support three operand instructions. For example, a processor according to one embodiment of the invention comprises: a set of registers for storing packed operands; Boolean operation logic to execute a single instruction which uses three or more source operands packed in the set of registers, the Boolean operation logic to read at least three source operands and an immediate value to perform a Boolean operation on the three source operands, wherein the Boolean operation comprises: combining a bit read from each of the three operands to form an index to the immediate value, the index identifying a bit position within the immediate value; reading the bit from the identified bit position of the immediate value; and storing the bit from the identified bit position of the immediate value in a destination register.

    摘要翻译： 描述了一种用于在流水线处理器中执行有效的布尔运算的装置和方法，其在一个实施例中不本地支持三个操作数指令。 例如，根据本发明的一个实施例的处理器包括：一组用于存储打包操作数的寄存器; 用于执行单个指令的布尔运算逻辑，其使用打包在该组寄存器中的三个或更多个源操作数，布尔运算逻辑读取至少三个源操作数，并且立即值对三个源操作数执行布尔运算，其中， 布尔操作包括：组合从三个操作数中的每一个读取的位以形成立即值的索引，该索引标识立即值内的位位置; 从识别的位置读取该位从立即值; 并将来自所识别的立即值的比特位置的比特存储在目的地寄存器中。

    Normal-basis to canonical-basis transformation for binary galois-fields GF(2m)
    5.
    发明授权
    Normal-basis to canonical-basis transformation for binary galois-fields GF(2m) 有权
    二进制Galois-field的典型基变换法（2m）

    公开(公告)号：US08380777B2

    公开(公告)日：2013-02-19

    申请号：US11772176

    申请日：2007-06-30

    申请人： Erdinc Ozturk ,  Vinodh Gopal ,  Gilbert Wolrich ,  Wajdi K. Feghali

    发明人： Erdinc Ozturk ,  Vinodh Gopal ,  Gilbert Wolrich ,  Wajdi K. Feghali

    IPC分类号： G06F7/72

    CPC分类号： G06F7/724

    摘要： Basis conversion from normal form to canonical form is provided for both generic polynomials and special irreducible polynomials in the form of “all ones”, referred to as “all-ones-polynomials” (AOP). Generation and storing of large matrices is minimized by creating matrices on the fly, or by providing an alternate means of computing a result with minimal hardware extensions.

    摘要翻译： 对于通用多项式和以所有形式的所有形式的特殊不可约多项式提供了从正常形式到规范形式的基础转换，称为全要素多项式（AOP）。 通过在飞行中创建矩阵，或者通过提供以最小的硬件扩展来计算结果的替代方法来最小化大矩阵的生成和存储。

    RESIDUE GENERATION
    7.
    发明申请
    RESIDUE GENERATION 失效
    残留生成

    公开(公告)号：US20100153829A1

    公开(公告)日：2010-06-17

    申请号：US12336029

    申请日：2008-12-16

    申请人： Vinodh Gopal ,  Erdinc Ozturk ,  Gilbert Wolrich ,  Wajdi Feghali

    发明人： Vinodh Gopal ,  Erdinc Ozturk ,  Gilbert Wolrich ,  Wajdi Feghali

    IPC分类号： H03M13/09 ,  G06F7/72 ,  G06F11/10

    CPC分类号： G06F7/724 ,  H03M13/091

    摘要： In one embodiment, circuitry is provided to generate a residue based at least in part upon operations and a data stream generated based at least in part upon a packet. The operations may include at least one iteration of at least one reduction operation including (a) multiplying a first value with at least one portion of the data stream, and (b) producing a reduction by adding at least one other portion of the data stream to a result of the multiplying. The operations may include at least one other reduction operation including (c) producing another result by multiplying with a second value at least one portion of another stream based at least in part upon the reduction, (d) producing a third value by adding at least one other portion of the another stream to the another result, and (e) producing the residue by performing a Barrett reduction based at least in part upon the third value.

    摘要翻译： 在一个实施例中，提供电路以至少部分地基于至少部分地基于分组产生的操作和数据流来生成残差。 操作可以包括至少一个缩减操作的迭代，包括（a）将第一值与数据流的至少一部分相乘，以及（b）通过添加数据流的至少一个其他部分来产生减少 是乘法的结果。 所述操作可以包括至少一个其它减少操作，其包括（c）至少部分地基于所述减少，通过与另一个流的至少一部分乘以第二值来产生另一结果，（d）通过至少加入来产生第三值 另一个流的另一部分到另一个结果，以及（e）至少部分地基于第三个值执行巴雷特还原来产生残留物。

    Determining a message residue
    10.
    发明授权
    Determining a message residue 有权
    确定消息残差

    公开(公告)号：US08042025B2

    公开(公告)日：2011-10-18

    申请号：US12291621

    申请日：2008-11-12

    申请人： Vinodh Gopal ,  Gilbert Wolrich ,  Wajdi Feghali ,  Erdinc Ozturk ,  Shay Gueron

    发明人： Vinodh Gopal ,  Gilbert Wolrich ,  Wajdi Feghali ,  Erdinc Ozturk ,  Shay Gueron

    IPC分类号： H03M13/03

    CPC分类号： G06F7/724 ,  H03M13/091

    摘要： In one aspect, circuitry to determine a modular remainder with respect to a polynomial of a message comprised of a series of segment. In another aspect, circuitry to access at least a portion of a first number having a first endian format, determine a second number based on a bit reflection and shift of a third number having an endian format opposite to that of the first endian format, and perform a polynomial multiplication of the first number and the at least a portion of the first number.

    摘要翻译： 在一个方面，用于确定相对于包括一系列段的消息的多项式的模块余数的电路。 在另一方面，访问具有第一末端格式的第一号码的至少一部分的电路基于具有与第一末端格式相反的端格式的第三号码的位反射和位移来确定第二号码，以及 执行第一数字和第一数字的至少一部分的多项式相乘。