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1.发明授权公开(公告)号：US07577036B2
公开(公告)日：2009-08-18
申请号：US11799658
申请日：2007-05-02
IPC分类号： G11C16/06
CPC分类号： G11C16/3418 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/349 , G11C2211/5634
摘要： Embodiments of the present disclosure provide methods, devices, modules, and systems for non-volatile multilevel memory cell data retrieval with data read of reference cells. One method includes programming at least one data cell of a number of data cells coupled to a selected word line to a target data threshold voltage (Vt) level corresponding to a target state; programming at least one reference cell of a number of reference cells coupled to the selected word line to a target reference Vt level, the number of reference cells interleaved with the number of data cells; determining a reference state based on a data read of the at least one reference cell; and changing a state read from the at least one data cell based on a change of the at least one reference cell.
摘要翻译： 本公开的实施例提供用于参考单元的数据读取的用于非易失性多级存储器单元数据检索的方法，设备，模块和系统。 一种方法包括将耦合到所选字线的多个数据单元的至少一个数据单元编程为对应于目标状态的目标数据阈值电压（Vt）电平; 将耦合到所选字线的多个参考单元的至少一个参考单元编程为目标参考Vt电平，与数据单元数量交织的参考单元的数量; 基于所述至少一个参考单元的数据读取确定参考状态; 以及基于所述至少一个参考单元的改变来改变从所述至少一个数据单元读取的状态。
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2.发明申请公开(公告)号：US20080273384A1
公开(公告)日：2008-11-06
申请号：US11799658
申请日：2007-05-02
IPC分类号： G11C11/34
CPC分类号： G11C16/3418 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/349 , G11C2211/5634
摘要： Embodiments of the present disclosure provide methods, devices, modules, and systems for non-volatile multilevel memory cell data retrieval with data read of reference cells. One method includes programming at least one data cell of a number of data cells coupled to a selected word line to a target data threshold voltage (Vt) level corresponding to a target state; programming at least one reference cell of a number of reference cells coupled to the selected word line to a target reference Vt level, the number of reference cells interleaved with the number of data cells; determining a reference state based on a data read of the at least one reference cell; and changing a state read from the at least one data cell based on a change of the at least one reference cell.
摘要翻译： 本公开的实施例提供用于参考单元的数据读取的用于非易失性多级存储器单元数据检索的方法，设备，模块和系统。 一种方法包括将耦合到所选字线的多个数据单元的至少一个数据单元编程为对应于目标状态的目标数据阈值电压（Vt）电平; 将耦合到所选字线的多个参考单元的至少一个参考单元编程为目标参考Vt电平，与数据单元数量交织的参考单元的数量; 基于所述至少一个参考单元的数据读取确定参考状态; 以及基于所述至少一个参考单元的改变来改变从所述至少一个数据单元读取的状态。
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3.发明授权公开(公告)号：US08243513B2
公开(公告)日：2012-08-14
申请号：US13007971
申请日：2011-01-17
IPC分类号： G11C16/04
CPC分类号： G11C16/3418 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/349 , G11C2211/5634
摘要： Embodiments of the present disclosure provide methods, devices, modules, and systems for non-volatile multilevel memory cell data retrieval with data read of reference cells. One method includes programming at least one data cell of a number of data cells coupled to a selected word line to a target data threshold voltage (Vt) level corresponding to a target state; programming at least one reference cell of a number of reference cells coupled to the selected word line to a target reference Vt level, the number of reference cells interleaved with the number of data cells; determining a reference state based on a data read of the at least one reference cell; and changing a state read from the at least one data cell based on a change of the at least one reference cell.
摘要翻译： 本公开的实施例提供用于参考单元的数据读取的用于非易失性多级存储器单元数据检索的方法，设备，模块和系统。 一种方法包括将耦合到所选字线的多个数据单元的至少一个数据单元编程为对应于目标状态的目标数据阈值电压（Vt）电平; 将耦合到所选字线的多个参考单元的至少一个参考单元编程为目标参考Vt电平，与数据单元数量交织的参考单元的数量; 基于所述至少一个参考单元的数据读取确定参考状态; 以及基于所述至少一个参考单元的改变来改变从所述至少一个数据单元读取的状态。
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4.发明申请公开(公告)号：US20110110152A1
公开(公告)日：2011-05-12
申请号：US13007971
申请日：2011-01-17
IPC分类号： G11C16/28
CPC分类号： G11C16/3418 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/349 , G11C2211/5634
摘要： Embodiments of the present disclosure provide methods, devices, modules, and systems for non-volatile multilevel memory cell data retrieval with data read of reference cells. One method includes programming at least one data cell of a number of data cells coupled to a selected word line to a target data threshold voltage (Vt) level corresponding to a target state; programming at least one reference cell of a number of reference cells coupled to the selected word line to a target reference Vt level, the number of reference cells interleaved with the number of data cells; determining a reference state based on a data read of the at least one reference cell; and changing a state read from the at least one data cell based on a change of the at least one reference cell.
摘要翻译： 本公开的实施例提供用于参考单元的数据读取的用于非易失性多级存储器单元数据检索的方法，设备，模块和系统。 一种方法包括将耦合到所选字线的多个数据单元的至少一个数据单元编程为对应于目标状态的目标数据阈值电压（Vt）电平; 将耦合到所选字线的多个参考单元的至少一个参考单元编程为目标参考Vt电平，与数据单元数量交织的参考单元的数量; 基于所述至少一个参考单元的数据读取确定参考状态; 以及基于所述至少一个参考单元的改变来改变从所述至少一个数据单元读取的状态。
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5.发明申请公开(公告)号：US20080273395A1
公开(公告)日：2008-11-06
申请号：US11799657
申请日：2007-05-02
IPC分类号： G11C11/34
CPC分类号： G11C11/5642 , G11C16/0483 , G11C2211/5621
摘要： Embodiments of the present disclosure provide methods, devices, modules, and systems for utilizing an expanded programming window for non-volatile multilevel memory cells. One method includes associating a different logical state with each of a number of different threshold voltage (Vt) distributions. In various embodiments, at least two Vt distributions include negative Vt levels. The method includes applying a read voltage to a word line of a selected cell while applying a pass voltage to word lines of unselected cells, applying a boost voltage to a source line coupled to the selected cell, applying a voltage greater than the boost voltage to a bit line of the selected cell, and sensing a current variation of the bit line in response to the selected cell changing from a non-conducting state to a conducting state.
摘要翻译： 本公开的实施例提供了用于利用用于非易失性多层存储器单元的扩展编程窗口的方法，设备，模块和系统。 一种方法包括将不同的逻辑状态与多个不同的阈值电压（Vt）分布中的每一个相关联。 在各种实施例中，至少两个Vt分布包括负Vt电平。 该方法包括将读取电压施加到所选择的单元的字线，同时向未选择的单元的字线施加通过电压，向耦合到所选择的单元的源极线施加升压电压，将大于升压电压的电压施加到 所选择的单元的位线，并且响应于所选择的单元从非导通状态改变到导通状态来感测位线的当前变化。
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公开(公告)号：US07948802B2
公开(公告)日：2011-05-24
申请号：US11999359
申请日：2007-12-04
IPC分类号： G11C11/34
CPC分类号： G11C16/12 , G11C7/16 , G11C11/5642 , G11C16/0483 , G11C16/28 , G11C2211/5621 , G11C2211/5634 , G11C2211/5642
摘要： The present disclosure includes methods, devices, modules, and systems for operating memory cells. One method embodiment includes applying a ramping voltage to a control gate of a memory cell and to an analog-to-digital converter (ADC). The aforementioned embodiment of a method also includes detecting an output of the ADC at least partially in response to when the ramping voltage causes the memory cell to trip sense circuitry.
摘要翻译： 本公开包括用于操作存储器单元的方法，设备，模块和系统。 一种方法实施例包括将斜波电压施加到存储器单元的控制栅极和模数转换器（ADC）。 上述方法的实施例还包括响应于斜坡电压何时使存储器单元跳闸感测电路至少部分地检测ADC的输出。
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公开(公告)号：US20110090735A1
公开(公告)日：2011-04-21
申请号：US12971587
申请日：2010-12-17
IPC分类号： G11C16/04
CPC分类号： G11C11/5642 , G11C16/0483 , G11C2211/5621
摘要： Embodiments of the present disclosure provide methods, devices, modules, and systems for utilizing an expanded programming window for non-volatile multilevel memory cells. One method includes associating a different logical state with each of a number of different threshold voltage (Vt) distributions. In various embodiments, at least two Vt distributions include negative Vt levels. The method includes applying a read voltage to a word line of a selected cell while applying a pass voltage to word lines of unselected cells, applying a boost voltage to a source line coupled to the selected cell, applying a voltage greater than the boost voltage to a bit line of the selected cell, and sensing a current variation of the bit line in response to the selected cell changing from a non-conducting state to a conducting state.
摘要翻译： 本公开的实施例提供了用于利用用于非易失性多层存储器单元的扩展编程窗口的方法，设备，模块和系统。 一种方法包括将不同的逻辑状态与多个不同的阈值电压（Vt）分布中的每一个相关联。 在各种实施例中，至少两个Vt分布包括负Vt电平。 该方法包括将读取电压施加到所选择的单元的字线，同时向未选择的单元的字线施加通过电压，向耦合到所选择的单元的源极线施加升压电压，将大于升压电压的电压施加到 所选择的单元的位线，并且响应于所选择的单元从非导通状态改变到导通状态来感测位线的当前变化。
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8.发明授权公开(公告)号：US07864584B2
公开(公告)日：2011-01-04
申请号：US11799657
申请日：2007-05-02
IPC分类号： G11C16/26
CPC分类号： G11C11/5642 , G11C16/0483 , G11C2211/5621
摘要： Embodiments of the present disclosure provide methods, devices, modules, and systems for utilizing an expanded programming window for non-volatile multilevel memory cells. One method includes associating a different logical state with each of a number of different threshold voltage (Vt) distributions. In various embodiments, at least two Vt distributions include negative Vt levels. The method includes applying a read voltage to a word line of a selected cell while applying a pass voltage to word lines of unselected cells, applying a boost voltage to a source line coupled to the selected cell, applying a voltage greater than the boost voltage to a bit line of the selected cell, and sensing a current variation of the bit line in response to the selected cell changing from a non-conducting state to a conducting state.
摘要翻译： 本公开的实施例提供了用于利用用于非易失性多层存储器单元的扩展编程窗口的方法，设备，模块和系统。 一种方法包括将不同的逻辑状态与多个不同的阈值电压（Vt）分布中的每一个相关联。 在各种实施例中，至少两个Vt分布包括负Vt电平。 该方法包括将读取电压施加到所选择的单元的字线，同时向未选择的单元的字线施加通过电压，向耦合到所选择的单元的源极线施加升压电压，将大于升压电压的电压施加到 所选择的单元的位线，并且响应于所选择的单元从非导通状态改变到导通状态来感测位线的当前变化。
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9.发明申请公开(公告)号：US20090273975A1
公开(公告)日：2009-11-05
申请号：US12504292
申请日：2009-07-16
CPC分类号： G11C16/3418 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/349 , G11C2211/5634
摘要： Embodiments of the present disclosure provide methods, devices, modules, and systems for non-volatile multilevel memory cell data retrieval with data read of reference cells. One method includes programming at least one data cell of a number of data cells coupled to a selected word line to a target data threshold voltage (Vt) level corresponding to a target state; programming at least one reference cell of a number of reference cells coupled to the selected word line to a target reference Vt level, the number of reference cells interleaved with the number of data cells; determining a reference state based on a data read of the at least one reference cell; and changing a state read from the at least one data cell based on a change of the at least one reference cell.
摘要翻译： 本公开的实施例提供用于参考单元的数据读取的用于非易失性多级存储器单元数据检索的方法，设备，模块和系统。 一种方法包括将耦合到所选字线的多个数据单元的至少一个数据单元编程为对应于目标状态的目标数据阈值电压（Vt）电平; 将耦合到所选字线的多个参考单元的至少一个参考单元编程为目标参考Vt电平，与数据单元数量交织的参考单元的数量; 基于所述至少一个参考单元的数据读取确定参考状态; 以及基于所述至少一个参考单元的改变来改变从所述至少一个数据单元读取的状态。
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公开(公告)号：US08169832B2
公开(公告)日：2012-05-01
申请号：US12909414
申请日：2010-10-21
申请人： Vishal Sarin , Dzung Nguyen , Jonathan Pabustan , Jung Sheng Hoei , Jason Guo , William Saiki
发明人： Vishal Sarin , Dzung Nguyen , Jonathan Pabustan , Jung Sheng Hoei , Jason Guo , William Saiki
IPC分类号： G11C11/34
CPC分类号： G11C16/344 , G11C16/0483 , G11C16/3445
摘要： Methods and apparatus are disclosed, such as those involving a flash memory device that includes a memory block. The memory block includes a plurality of data lines extending substantially parallel to one another, and a plurality of memory cells. One such method includes erasing the memory cells; and performing erase verification on the memory cells. The erase verification includes determining one memory cell by one memory cell whether the individual memory cells coupled to one of the data lines have been erased. The method can also include performing a re-erase operation that selectively re-erases unerased memory cells based at least partly on the result of the erase verification.
摘要翻译： 公开了诸如涉及包括存储器块的闪速存储器件的方法和装置。 存储块包括基本上彼此平行延伸的多条数据线，以及多个存储单元。 一种这样的方法包括擦除存储器单元; 并对存储器单元执行擦除验证。 擦除验证包括由一个存储器单元确定耦合到数据线之一中的各个存储器单元是否已经被擦除的一个存储器单元。 该方法还可以包括执行至少部分地基于擦除验证的结果来选择性地重新擦除未故障存储器单元的重擦除操作。
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