公开(公告)号：US12119069B2

公开(公告)日：2024-10-15

申请号：US17955579

申请日：2022-09-29

申请人： WUXI ESIONTECH CO., LTD.

发明人： Zhengzhou Cao ,  Jie Zhu ,  Yanfei Zhang ,  Jing Sun ,  Zhenkai Ji ,  Zhengnan Ding

IPC分类号： G11C17/00 ,  G11C7/10 ,  G11C7/12 ,  G11C17/18

CPC分类号： G11C17/18 ,  G11C7/1069 ,  G11C7/1093 ,  G11C7/12

摘要： In an anti-fuse memory reading circuit with controllable reading time, a reading time control circuit generates a control signal corresponding to reading time. Based on a clock signal, a programmable reading pulse generation circuit generates a reading pulse with a pulse width corresponding to the control signal. Based on the reading pulse and the control signal, the reading amplification circuit selects a pull-up current source corresponding to the reading time, pulls up a voltage on a bit line (BL) of an anti-fuse memory cell, reads data stored in the anti-fuse memory cell starting from a rising edge of the reading pulse, and latches the read data at a falling edge of the reading pulse. The anti-fuse memory reading circuit can generate a reading pulse with a corresponding pulse width and a pull-up current source with a corresponding size based on the required reading time.