公开(公告)号：US5418738A

公开(公告)日：1995-05-23

申请号：US221515

申请日：1994-04-01

申请人： Wagdi W. Abadeer ,  Badih El-Kareh ,  Wayne F. Ellis ,  Duane E. Galbi ,  Nathan R. Hiltebeitel ,  William R. Tonti ,  Josef S. Watts

发明人： Wagdi W. Abadeer ,  Badih El-Kareh ,  Wayne F. Ellis ,  Duane E. Galbi ,  Nathan R. Hiltebeitel ,  William R. Tonti ,  Josef S. Watts

IPC分类号： G11C11/413 ,  G11C11/401 ,  G11C17/00 ,  G11C17/06 ,  G11C17/14 ,  G11C17/16 ,  G11C29/00 ,  G11C29/04 ,  H01L27/10

CPC分类号： G11C29/785 ,  G11C17/14 ,  G11C17/16

摘要： A programmable storage element for redundancy-programing includes a programmable antifuse circuit, which includes a plurality of first resistors and a switching circuit for coupling the first resistors in series in response to a plurality of first control signals and for coupling the first resistors in parallel in response to a plurality of second control signals to permit programing of the first resistors, and a sensing circuit for determining whether or not the first resistors have been programmed. The state of the first resistors is determined by comparing a first voltage drop across the first resistors with a second voltage drop across a second resistor. Each of the first resistors is an unsilicided polysilicon conductor which has an irreversible resistance decrease when a predetermined threshold current is applied for a minimum period of time.

摘要翻译： 用于冗余编程的可编程存储元件包括可编程反熔丝电路，其包括多个第一电阻器和用于响应于多个第一控制信号串联耦合第一电阻器并用于将第一电阻器并联耦合的开关电路 响应于多个第二控制信号以允许编程第一电阻器，以及用于确定第一电阻器是否已被编程的感测电路。 第一电阻器的状态通过将第一电阻器两端的第一电压降与第二电阻器上的第二电压降进行比较来确定。 每个第一电阻器是非极性多晶硅导体，当预定阈值电流施加最小时间时，其具有不可逆电阻降低。

公开(公告)号：US5334880A

公开(公告)日：1994-08-02

申请号：US693463

申请日：1991-04-30

申请人： Wagdi W. Abadeer ,  Badih El-Kareh ,  Wayne F. Ellis ,  Duane E. Galbi ,  Nathan R. Hiltebeitel ,  William R. Tonti ,  Josef S. Watts

发明人： Wagdi W. Abadeer ,  Badih El-Kareh ,  Wayne F. Ellis ,  Duane E. Galbi ,  Nathan R. Hiltebeitel ,  William R. Tonti ,  Josef S. Watts

IPC分类号： G11C11/413 ,  G11C11/401 ,  G11C17/00 ,  G11C17/06 ,  G11C17/14 ,  G11C17/16 ,  G11C29/00 ,  G11C29/04 ,  H01L27/10 ,  G11C11/34 ,  G11C7/00 ,  G11C11/40 ,  H01L29/04

CPC分类号： G11C29/785 ,  G11C17/14 ,  G11C17/16

摘要： A programmable storage element for redundancy-programming includes a programmable antifuse circuit, which includes a plurality of first resistors and a switching circuit for coupling the first resistors in series in response to a plurality of first control signals and for coupling the first resistors in parallel in response to a plurality of second control signals to permit programming of the first resistors, and a sensing circuit for determining whether or not the first resistors have been programmed. The state of the first resistors is determined by comparing a first voltage drop across the first resistors with a second voltage drop across a second resistor. Each of the first resistors is an unsilicided polysilicon conductor which has an irreversible resistance decrease when a predetermined threshold current is applied for a minimum period of time.

摘要翻译： 用于冗余编程的可编程存储元件包括可编程反熔丝电路，其包括多个第一电阻器和用于响应于多个第一控制信号串联耦合第一电阻器并用于将第一电阻器并联耦合的开关电路 响应于多个第二控制信号以允许对第一电阻器进行编程;以及感测电路，用于确定第一电阻器是否已被编程。 第一电阻器的状态通过将第一电阻器两端的第一电压降与第二电阻器上的第二电压降进行比较来确定。 每个第一电阻器是非极性多晶硅导体，当预定阈值电流施加最小时间时，其具有不可逆电阻降低。

公开(公告)号：US5420456A

公开(公告)日：1995-05-30

申请号：US193927

申请日：1994-02-09

申请人： Duane E. Galbi ,  William H. Guthrie ,  Oliver Kiehl ,  Jack A. Mandelman ,  Josef S. Watts

发明人： Duane E. Galbi ,  William H. Guthrie ,  Oliver Kiehl ,  Jack A. Mandelman ,  Josef S. Watts

IPC分类号： H01L21/82 ,  H01L23/525 ,  H02H7/20

CPC分类号： H01L23/5252 ,  H01L23/5256 ,  H01L2924/0002

摘要： A fuse, having reduced blow-current requirements thereby minimizing the power supply voltage and chip area required for the driver transistors, has a geometry which is characterized by an essentially uniform width dimension throughout the primary axis of the fuse link but having at least one approximately right angle bend in the fuse link. The fuse can be blown open with approximately 10% of the input current density required for a straight fuse of equal cross-sectional area. The reason for this is that, due to current crowding, the current density is accentuated at the inside corner of the bend. As the input current to the fuse is increased, a current density is reached at the inside corner which causes the fuse material to melt. A notch forms at the inside corner. The fuse geometry altered by the notching causes even more severe current crowding at the notches, and this in turn makes the melting propagate across the width of the fuse. The predictability of the point of fuse blow out allows even greater circuit densities while minimizing the possibility of accidental damage to adjacent devices.

摘要翻译： 具有降低的电流要求从而使驱动晶体管所需的电源电压和芯片面积最小化的保险丝具有几何形状，其特征在于在熔丝链的整个主轴上具有基本上均匀的宽度尺寸，但具有至少一个约 熔断体直角弯曲。 保险丝可以被吹开，其截面积相等的直线熔断器所需的输入电流密度约为10％。 这样做的原因是，由于目前的拥挤，电流密度在弯道的内角突出。 当保险丝的输入电流增加时，在内角处达到电流密度，导致保险丝材料熔化。 内角处形成凹痕。 通过开槽改变的保险丝几何在槽口处引起更严重的电流拥挤，这又导致熔化在保险丝的宽度上传播。 保险丝熔断点的可预测性允许更大的电路密度，同时最小化对相邻设备的意外损坏的可能性。

公开(公告)号：US08453101B1

公开(公告)日：2013-05-28

申请号：US13302350

申请日：2011-11-22

申请人： James M. Johnson ,  Scott K. Springer ,  Rainer Thoma ,  Josef S. Watts

发明人： James M. Johnson ,  Scott K. Springer ,  Rainer Thoma ,  Josef S. Watts

IPC分类号： G06F11/22 ,  G06F17/50

CPC分类号： G06F17/5045

摘要： Disclosed are embodiments of a method, system and program storage device for generating accurate performance targets for active semiconductor devices during technology node development in order to reduce the number of iterations required for model extraction and/or to improve model quality. In these embodiments, initial sets of performance targets for related semiconductor devices are generated, e.g., by making assumptions based on hardware measurements taken from semiconductor devices in prior technology nodes. Additional processes are then performed on the initial sets of performance targets prior to the modeling stage in order to detect and resolve any inconsistencies between the data in the sets. Specifically, plotting techniques are performed with respect to the performance targets. The results are analyzed to detect any inconsistencies indicating that the performance targets are inaccurate and adjustments are made to the performance targets in order to resolve those inconsistencies.

摘要翻译： 公开了用于在技术节点开发期间产生有源半导体器件的精确性能目标的方法，系统和程序存储装置的实施例，以便减少模型提取所需的迭代次数和/或提高模型质量。 在这些实施例中，例如通过基于从现有技术节点中的半导体器件获得的硬件测量值做出假设来生成相关半导体器件的初始的性能目标集合。 然后在建模阶段之前对初始的性能目标集进行其他过程，以便检测和解决集合中的数据之间的任何不一致。 具体地，针对性能目标执行绘图技术。 分析结果以检测指示性能目标不准确的任何不一致性，并对性能目标进行调整以解决这些不一致。

公开(公告)号：US20130132925A1

公开(公告)日：2013-05-23

申请号：US13302350

申请日：2011-11-22

申请人： James M. Johnson ,  Scott K. Springer ,  Rainer Thoma ,  Josef S. Watts

发明人： James M. Johnson ,  Scott K. Springer ,  Rainer Thoma ,  Josef S. Watts

IPC分类号： G06F17/50

CPC分类号： G06F17/5045

摘要： Disclosed are embodiments of a method, system and program storage device for generating accurate performance targets for active semiconductor devices during technology node development in order to reduce the number of iterations required for model extraction and/or to improve model quality. In these embodiments, initial sets of performance targets for related semiconductor devices are generated, e.g., by making assumptions based on hardware measurements taken from semiconductor devices in prior technology nodes. Additional processes are then performed on the initial sets of performance targets prior to the modeling stage in order to detect and resolve any inconsistencies between the data in the sets. Specifically, plotting techniques are performed with respect to the performance targets. The results are analyzed to detect any inconsistencies indicating that the performance targets are inaccurate and adjustments are made to the performance targets in order to resolve those inconsistencies.

摘要翻译： 公开了用于在技术节点开发期间产生有源半导体器件的精确性能目标的方法，系统和程序存储装置的实施例，以便减少模型提取所需的迭代次数和/或提高模型质量。 在这些实施例中，例如通过基于从现有技术节点中的半导体器件获得的硬件测量值做出假设来生成相关半导体器件的初始的性能目标集合。 然后在建模阶段之前对初始的性能目标集进行其他过程，以便检测和解决集合中的数据之间的任何不一致。 具体地，针对性能目标执行绘图技术。 分析结果以检测指示性能目标不准确的任何不一致性，并对性能目标进行调整以解决这些不一致。

公开(公告)号：US20120068722A1

公开(公告)日：2012-03-22

申请号：US12886064

申请日：2010-09-20

申请人： Sourabh Khandelwal ,  Josef S. Watts

发明人： Sourabh Khandelwal ,  Josef S. Watts

IPC分类号： G01R27/28

CPC分类号： G01R19/00 ,  G01R31/2621

摘要： In one embodiment, a body region of a body-contacted silicon-on-insulator (SOI) metal-oxide-semiconductor-field-effect-transistor (MOSFET) is connected to a gate of another MOSFET in a sensing circuit to form a floating body node. The voltage at the floating body node is accurately obtained at the output of the sensing circuit and used to provide an estimate of required floating body voltage over a full device operating range.

摘要翻译： 在一个实施例中，体接触绝缘体上硅（SOI）金属氧化物半导体场效应晶体管（MOSFET）的体区连接到感测电路中的另一MOSFET的栅极以形成浮置 身体节点。 在感测电路的输出处精确地获得浮体节点处的电压，并用于在整个器件工作范围内提供所需浮体电压的估计。

公开(公告)号：US07353473B2

公开(公告)日：2008-04-01

申请号：US11381613

申请日：2006-05-04

申请人： Robinson E. Pino ,  Henry W. Trombley ,  Josef S. Watts

发明人： Robinson E. Pino ,  Henry W. Trombley ,  Josef S. Watts

IPC分类号： G06F17/50 ,  G06F17/10

CPC分类号： G06F17/5036

摘要： A method of modeling statistical variation of field effect transistors having fingers physically measures characteristics of existing transistors and extracts a scaled simulation based on the characteristics of the existing transistors using a first model. The method creates synthetic single finger data using the scaled simulation. The method physically measures characteristics of existing pairs of matched transistors and extracts random dopant fluctuations from the characteristics of the existing pairs of matched transistors using a second model that is different than the first model. The method extracts a single finger from the synthetic single finger data and the random dopant fluctuations using the first model. The method can also create an ensemble model by determining the skew between a typical single device model and a typical ensemble model. The method adjusts parameters of the first model to cause the single finger to match targets for the single finger. Also, the method produces the centered scalable single finger model (model C) after the adjustments are complete.

摘要翻译： 具有手指的场效应晶体管的统计变化的模型的方法物理地测量现有晶体管的特性，并且基于使用第一模型的现有晶体管的特性提取缩放模拟。 该方法使用缩放模拟创建合成单指数据。 该方法物理地测量现有的匹配晶体管对的特性，并使用不同于第一模型的第二模型从现有的匹配晶体管对的特性中提取随机掺杂物波动。 该方法使用第一模型从合成单指数据和随机掺杂剂波动提取单个手指。 该方法还可以通过确定典型的单个设备模型和典型的集合模型之间的偏差来创建集合模型。 该方法调整第一个模型的参数，使单个手指匹配单个手指的目标。 此外，在调整完成后，该方法产生居中的可伸缩单指模型（模型C）。

公开(公告)号：US08903697B2

公开(公告)日：2014-12-02

申请号：US13233176

申请日：2011-09-15

申请人： Henry W. Trombley ,  Josef S. Watts

发明人： Henry W. Trombley ,  Josef S. Watts

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F2217/10

摘要： A computer-implemented method for modeling Spatially Correlated Variation (SCV) in a design of an Integrated Circuit (IC) is disclosed. In one embodiment, the method includes: generating a set of coefficient values for a position dependent SCV function, the set of coefficient values being selected from a set of random variables; obtaining a set of coordinates defining a position of each of a plurality of devices in a defined field; evaluating the position dependent SCV function to determine a device attribute variation for each of the plurality of devices based upon the coordinates of each of the plurality of devices; modifying at least one model parameter based upon the evaluation of the position dependent SCV function; and running a circuit simulation using the at least one modified model parameter.

摘要翻译： 公开了一种用于在集成电路（IC）的设计中对空间相关变化（SCV）建模的计算机实现的方法。 在一个实施例中，该方法包括：产生用于位置相关SCV函数的一组系数值，该系数值集合是从一组随机变量中选择的; 在定义的字段中获得定义多个设备中的每一个的位置的坐标集合; 基于所述多个设备中的每一个的坐标来评估所述位置相关SCV功能以确定所述多个设备中的每一个的设备属性变化; 基于位置相关SCV功能的评估来修改至少一个模型参数; 以及使用所述至少一个修改的模型参数来运行电路仿真。

公开(公告)号：US20130073266A1

公开(公告)日：2013-03-21

申请号：US13233176

申请日：2011-09-15

申请人： Henry W. Trombley ,  Josef S. Watts

发明人： Henry W. Trombley ,  Josef S. Watts

IPC分类号： G06F17/50 ,  G06F17/10

CPC分类号： G06F17/5068 ,  G06F2217/10

摘要： A computer-implemented method for modeling Spatially Correlated Variation (SCV) in a design of an Integrated Circuit (IC) is disclosed. In one embodiment, the method includes: generating a set of coefficient values for a position dependent SCV function, the set of coefficient values being selected from a set of random variables; obtaining a set of coordinates defining a position of each of a plurality of devices in a defined field; evaluating the position dependent SCV function to determine a device attribute variation for each of the plurality of devices based upon the coordinates of each of the plurality of devices; modifying at least one model parameter based upon the evaluation of the position dependent SCV function; and running a circuit simulation using the at least one modified model parameter.

摘要翻译： 公开了一种用于在集成电路（IC）的设计中对空间相关变化（SCV）建模的计算机实现的方法。 在一个实施例中，该方法包括：产生用于位置相关SCV函数的一组系数值，该系数值集合是从一组随机变量中选择的; 在定义的字段中获得定义多个设备中的每一个的位置的坐标集合; 基于所述多个设备中的每一个的坐标来评估所述位置相关SCV功能以确定所述多个设备中的每一个的设备属性变化; 基于位置相关SCV功能的评估来修改至少一个模型参数; 以及使用所述至少一个修改的模型参数来运行电路仿真。

公开(公告)号：US06329690B1

公开(公告)日：2001-12-11

申请号：US09425393

申请日：1999-10-22

申请人： Kent E. Morrett ,  Edward J. Nowak ,  Stephen A. St. Onge ,  Josef S. Watts

发明人： Kent E. Morrett ,  Edward J. Nowak ,  Stephen A. St. Onge ,  Josef S. Watts

IPC分类号： H01L2701

CPC分类号： H01L27/1203 ,  H01L23/34 ,  H01L23/345 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor structure may include a silicon substrate, a first active device formed in a first region of the silicon substrate, a second active device formed in a second region of the silicon substrate, a first heating device connected thermally to the first active device and a second heating device connected thermally to the second active device. A first temperature sensing device detects a temperature of the first region, a second temperature sensing device detects a temperature of the second region and a circuit activates one of the first heating device and the second heating device in response to a sensed difference in temperature from the first and second temperature sensing devices.

摘要翻译： 半导体结构可以包括硅衬底，形成在硅衬底的第一区域中的第一有源器件，形成在硅衬底的第二区域中的第二有源器件，与第一有源器件热连接的第一加热器件和 第二加热装置与第二活动装置热连接。 第一温度感测装置检测第一区域的温度，第二温度感测装置检测第二区域的温度，并且电路响应于感测到的温度差异从第一加热装置和第二加热装置中的一个启动 第一和第二温度感测装置。