Method and system for multi-program clock recovery and timestamp correction
    1.
    发明申请
    Method and system for multi-program clock recovery and timestamp correction 失效
    多程序时钟恢复和时间戳校正的方法和系统

    公开(公告)号:US20060136768A1

    公开(公告)日:2006-06-22

    申请号:US10996582

    申请日:2004-11-23

    IPC分类号: G06F1/12

    摘要: A decoder includes a transport engine configured to receive programs and extract timing information and timestamps embedded in the programs. An adder is configured to add a set of timing offsets to the sets of timing information to adjust the timing information from a first time basis to a second time basis. Sums of the timing offsets and the timing information are referred to the mapped-timing information. A correction engine is configured to update the timing offsets as timing information is encountered in the programs, and an offset register is configured to: receive the timing offsets, store the timing offsets, and transfer the timing offsets to the adder. The adder is also configured to add the timing offsets to the timestamps to adjust the time basis of the timestamps from the first time basis to the second time basis. A program is decoder configured to receive the adjusted timestamps to decode the programs.

    摘要翻译: 解码器包括被配置为接收节目并提取嵌入在节目中的定时信息和时间戳的传输引擎。 加法器被配置为将一组定时偏移量添加到定时信息组,以便从第一时间基准到第二时间基准来调整定时信息。 定时偏移和定时信息的和被称为映射定时信息。 校正引擎被配置为在程序中遇到定时信息时更新定时偏移,并且偏移寄存器被配置为:接收定时偏移,存储定时偏移,并将定时偏移传送给加法器。 加法器还被配置为将时间偏移量添加到时间戳,以便调整从第一时间到第二时间的时间戳的时间基准。 程序是被配置为接收调整的时间戳以解码程序的解码器。

    Method and system for multi-program clock recovery and timestamp correction
    2.
    发明授权
    Method and system for multi-program clock recovery and timestamp correction 失效
    多程序时钟恢复和时间戳校正的方法和系统

    公开(公告)号:US07710965B2

    公开(公告)日:2010-05-04

    申请号:US10996582

    申请日:2004-11-23

    IPC分类号: H04J3/06

    摘要: A decoder includes a transport engine configured to receive programs and extract timing information and timestamps embedded in the programs. An adder is configured to add a set of timing offsets to the sets of timing information to adjust the timing information from a first time basis to a second time basis. Sums of the timing offsets and the timing information are referred to the mapped-timing information. A correction engine is configured to update the timing offsets as timing information is encountered in the programs, and an offset register is configured to: receive the timing offsets, store the timing offsets, and transfer the timing offsets to the adder. The adder is also configured to add the timing offsets to the timestamps to adjust the time basis of the timestamps from the first time basis to the second time basis. A program is decoder configured to receive the adjusted timestamps to decode the programs.

    摘要翻译: 解码器包括被配置为接收节目并提取嵌入在节目中的定时信息和时间戳的传输引擎。 加法器被配置为将一组定时偏移量添加到定时信息组,以便从第一时间基准到第二时间基准来调整定时信息。 定时偏移和定时信息的和被称为映射定时信息。 校正引擎被配置为在程序中遇到定时信息时更新定时偏移,并且偏移寄存器被配置为:接收定时偏移,存储定时偏移,并将定时偏移传送给加法器。 加法器还被配置为将时间偏移量添加到时间戳,以便调整从第一时间到第二时间的时间戳的时间基准。 程序是被配置为接收调整的时间戳以解码程序的解码器。

    Method and system for providing a home cable network
    3.
    发明授权
    Method and system for providing a home cable network 有权
    提供家庭有线网络的方法和系统

    公开(公告)号:US07730514B1

    公开(公告)日:2010-06-01

    申请号:US10870709

    申请日:2004-06-16

    IPC分类号: H04N7/173 H04N7/20

    CPC分类号: H04N7/106

    摘要: A system for converting digital signals in a cable network is provided. A cable head end provides a plurality of digital signals. The plurality of digital signals are grouped into a first portion and a second portion, the first portion being in a first frequency band and the second portion being in a second frequency band. The system includes a digital channel remapping module configured to select one or more digital signals from the first portion and remap the selected one or more digital signals into a first plurality of analog signals and a digital-to-analog translator configured to convert the digital signals in the second portion to a second plurality of analog signals. The first and second plurality of analog signals are combined and delivered to at least one analog device. Some or all of the second plurality of analog signals are within the first frequency band.

    摘要翻译: 提供了一种用于转换有线网络中的数字信号的系统。 电缆头端提供多个数字信号。 多个数字信号被分组为第一部分和第二部分,第一部分处于第一频带,第二部分处于第二频带。 该系统包括数字信道重映射模块,其被配置为从第一部分选择一个或多个数字信号,并将所选择的一个或多个数字信号重新映射为第一多个模拟信号,以及数模转换器,被配置为转换数字信号 在第二部分到第二多个模拟信号。 第一和第二多个模拟信号被组合并传送到至少一个模拟装置。 第二组多个模拟信号中的部分或全部在第一频带内。

    CMOS Image Sensors Implementing Full Frame Digital Correlated Double Sampling with Global Shutter
    4.
    发明申请
    CMOS Image Sensors Implementing Full Frame Digital Correlated Double Sampling with Global Shutter 有权
    CMOS图像传感器实现全帧数字相关双采样与全局快门

    公开(公告)号:US20130258151A1

    公开(公告)日:2013-10-03

    申请号:US13435071

    申请日:2012-03-30

    IPC分类号: H04N5/335

    摘要: An active pixel CMOS image sensor implements full frame digital correlated double sampling (CDS) with global shutter where all the pixels in the image sensor are reset at substantially the same time and all the pixels in the image sensor integrate incident light at substantially the same time and for substantially the same time duration and correlated double sampling cancellation is performed in the digital domain. In one embodiment, the image sensing device includes an array of light sensing elements, a timing and control circuit and analog-to-digital converters. The timing and control circuit is operative to reset the light sensing elements in the array and to control the array of light sensing elements to integrate incident light. The pixel reset values are cancelled from the corresponding light dependent pixel values for each of the light sensing elements to generate correlated double sampling (CDS) corrected digital output pixel values.

    摘要翻译: 有源像素CMOS图像传感器实现具有全局快门的全帧数字相关双采样(CDS),其中图像传感器中的所有像素基本上同时复位,并且图像传感器中的所有像素基本上同时地集成入射光 并且对于基本上相同的持续时间并且在数字域中执行相关的双采样消除。 在一个实施例中,图像感测装置包括光敏元件阵列,定时和控制电路以及模 - 数转换器。 定时和控制电路用于复位阵列中的光感测元件并且控制光感测元件的阵列以集成入射光。 对于每个光感测元件,像素复位值被从相应的依赖于光的像素值中消除以产生相关双倍采样(CDS)校正的数字输出像素值。

    Conversion gain modulation using charge sharing pixel
    5.
    发明授权
    Conversion gain modulation using charge sharing pixel 有权
    使用电荷共享像素的转换增益调制

    公开(公告)号:US08847136B2

    公开(公告)日:2014-09-30

    申请号:US13333133

    申请日:2011-12-21

    IPC分类号: H04N5/355 H01L27/146

    摘要: An image sensor including an array of pixel elements is operated according to two operation modes to modulate the conversion gain of the pixel to operate the image sensor based on the impinging light conditions. More specifically, an image sensor pixel element is operated in a high conversion gain mode for low light conditions and in a low conversion gain mode for bright light conditions. The low conversion gain mode implements charge sharing between the floating diffusion and the photodiode. The low conversion gain mode further implements partial reset where the photodiode and the floating diffusion are reset to the same potential and to a potential slightly less than the pinning voltage of the photodiode.

    摘要翻译: 包括像素元件阵列的图像传感器根据两种操作模式进行操作,以基于入射光条件来调制像素的转换增益以操作图像传感器。 更具体地,图像传感器像素元件在低光条件的高转换增益模式下操作,并且在明亮的光条件下以低转换增益模式工作。 低转换增益模式实现了浮动扩散和光电二极管之间的电荷共享。 低转换增益模式进一步实现部分复位,其中光电二极管和浮动扩散被复位到相同的电位并且稍微小于光电二极管的钉扎电压的电位。

    Method and system for providing a multi-channel interleaver/deinterleaver using SDRAM
    6.
    发明授权
    Method and system for providing a multi-channel interleaver/deinterleaver using SDRAM 有权
    使用SDRAM提供多通道交织器/解交织器的方法和系统

    公开(公告)号:US07051171B1

    公开(公告)日:2006-05-23

    申请号:US10412713

    申请日:2003-04-11

    IPC分类号: G06F12/00

    CPC分类号: G06F11/1008

    摘要: A deinterleaver for performing high-speed multi-channel forward error correction using external SDRAM is provided. According to one exemplary aspect, the deinterleaver performs both read and write accesses to the SDRAM that are burst-oriented by hiding active and precharge cycles in order to achieve high data rate operations. The data bus length of the SDRAM is designed to be twice the deinterleaving symbol size thereby allowing bandwidth to be increased. The deinterleaver accesses data in the SDRAM as read blocks and write blocks. Each block includes a predetermined number of data words to be interleaved/deinterleaved. The ACTIVE command for one block is issued when a preceding block is being processed. Data in one read/write block has the same row address within the same bank of the SDRAM.

    摘要翻译: 提供了一种使用外部SDRAM执行高速多通道前向纠错的去交织器。 根据一个示例性方面,解交织器通过隐藏有效和预充电周期对SDRAM进行读取和写入访问,以实现高数据速率操作。 SDRAM的数据总线长度设计为解交织符号大小的两倍,从而允许增加带宽。 解交织器将SDRAM中的数据作为读取块和写入块访问。 每个块包括要交织/去交错的预定数量的数据字。 当前一个块被处理时,发出一个块的ACTIVE命令。 一个读/写块中的数据在SDRAM的同一组内具有相同的行地址。

    Conversion Gain Modulation Using Charge Sharing Pixel
    7.
    发明申请
    Conversion Gain Modulation Using Charge Sharing Pixel 有权
    使用电荷共享像素的转换增益调制

    公开(公告)号:US20130020466A1

    公开(公告)日:2013-01-24

    申请号:US13333133

    申请日:2011-12-21

    IPC分类号: H01L27/146

    摘要: An image sensor including an array of pixel elements is operated according to two operation modes to modulate the conversion gain of the pixel to operate the image sensor based on the impinging light conditions. More specifically, an image sensor pixel element is operated in a high conversion gain mode for low light conditions and in a low conversion gain mode for bright light conditions. The low conversion gain mode implements charge sharing between the floating diffusion and the photodiode. The low conversion gain mode further implements partial reset where the photodiode and the floating diffusion are reset to the same potential and to a potential slightly less than the pinning voltage of the photodiode.

    摘要翻译: 包括像素元件阵列的图像传感器根据两种操作模式进行操作,以基于入射光条件来调制像素的转换增益以操作图像传感器。 更具体地,图像传感器像素元件在低光条件的高转换增益模式下操作,并且在明亮的光条件下以低转换增益模式工作。 低转换增益模式实现了浮动扩散和光电二极管之间的电荷共享。 低转换增益模式进一步实现部分复位,其中光电二极管和浮动扩散被复位到相同的电位并且稍微小于光电二极管的钉扎电压的电位。

    METHOD AND SYSTEM FOR REMOTE SECURITY TOKEN EXTENSION
    8.
    发明申请
    METHOD AND SYSTEM FOR REMOTE SECURITY TOKEN EXTENSION 审中-公开
    远程安全扩展的方法和系统

    公开(公告)号:US20080120712A1

    公开(公告)日:2008-05-22

    申请号:US11943318

    申请日:2007-11-20

    申请人: Thomas Ayers

    发明人: Thomas Ayers

    IPC分类号: H04L9/32

    摘要: A method and system for extending the range of a security token allow a system to have a security token be utilized remotely from the system that will receive information and signals from that security token. A remote token extender can interface with a security token (such as an identity (or ID) token), configure the signals and information associated with that security token into a format for transmission across a selected media (such as a network), and transmit those signals and information across that media. At the receiving end, a local token extender can reconstitute those signals and information for use by a complementary device (such as an ID card reader) at the local system.

    摘要翻译: 用于扩展安全令牌的范围的方法和系统允许系统具有从系统远程利用安全令牌,该系统将从该安全令牌接收信息和信号。 远程令牌扩展器可以与安全令牌(例如身份(或ID)令牌)接口),将与该安全令牌相关联的信号和信息配置为跨选定媒体(如网络)传输的格式,并传输 这些信号和信息在该媒体。 在接收端,本地令牌扩展器可以重建这些信号和信息,供本地系统的互补设备(如ID卡读卡器)使用。

    Multi-function power washer
    9.
    发明申请
    Multi-function power washer 失效
    多功能电动洗衣机

    公开(公告)号:US20060254008A1

    公开(公告)日:2006-11-16

    申请号:US11376610

    申请日:2006-03-14

    IPC分类号: A47L11/28

    摘要: A power washer is provided with a transport frame, a wash unit and a gun. The wash unit and the gun may be separated from the transport frame to be used in multiple modes. Possible modes include a walk-behind mode, a spray mode and hand wash modes. A quick connection is also provided to make it easier to disconnect and reconnect various components of the power washer.

    摘要翻译: 电动洗衣机设有运输框架,洗涤单元和枪。 洗涤单元和枪可以与运输框架分离以用于多种模式。 可能的模式包括步行模式,喷雾模式和手洗模式。 还提供快速连接,以便更容易地断开并重新连接电动洗衣机的各种部件。

    CMOS image sensors implementing full frame digital correlated double sampling with global shutter
    10.
    发明授权
    CMOS image sensors implementing full frame digital correlated double sampling with global shutter 有权
    CMOS图像传感器实现全帧数字相关双采样与全局快门

    公开(公告)号:US08953075B2

    公开(公告)日:2015-02-10

    申请号:US13435071

    申请日:2012-03-30

    IPC分类号: H04N5/335

    摘要: An active pixel CMOS image sensor implements full frame digital correlated double sampling (CDS) with global shutter where all the pixels in the image sensor are reset at substantially the same time and all the pixels in the image sensor integrate incident light at substantially the same time and for substantially the same time duration and correlated double sampling cancellation is performed in the digital domain. In one embodiment, the image sensing device includes an array of light sensing elements, a timing and control circuit and analog-to-digital converters. The timing and control circuit is operative to reset the light sensing elements in the array and to control the array of light sensing elements to integrate incident light. The pixel reset values are cancelled from the corresponding light dependent pixel values for each of the light sensing elements to generate correlated double sampling (CDS) corrected digital output pixel values.

    摘要翻译: 有源像素CMOS图像传感器实现具有全局快门的全帧数字相关双采样(CDS),其中图像传感器中的所有像素在基本相同的时间被复位,并且图像传感器中的所有像素基本上同时地集成入射光 并且对于基本上相同的持续时间并且在数字域中执行相关的双采样消除。 在一个实施例中,图像感测装置包括光敏元件阵列,定时和控制电路以及模 - 数转换器。 定时和控制电路用于复位阵列中的光感测元件并且控制光感测元件的阵列以集成入射光。 对于每个光感测元件,像素复位值被从相应的依赖于光的像素值中消除以产生相关双倍采样(CDS)校正的数字输出像素值。