专利检索 ap:("Wendell L. Little" OR "Matthew K. Adams" OR "David A. Bunsey, Jr.") AND inv:"David A. Bunsey, Jr." 第 1 页

1.

发明授权
Hardware for verifying that software has not skipped a predetermined amount of code 失效
标题翻译：用于验证该软件未跳过预定量代码的硬件

公开(公告)号：US5758060A

公开(公告)日：1998-05-26

申请号：US611037

申请日：1996-03-05

申请人： Wendell L. Little , Matthew K. Adams , David A. Bunsey, Jr.

发明人： Wendell L. Little , Matthew K. Adams , David A. Bunsey, Jr.

IPC分类号： G06F11/28 , G06F11/00

CPC分类号： G06F11/28

摘要： A hardware circuit for verifying the execution of software is disclosed wherein the circuit compares a stored value with another value that is stored at at least one predetermined time in the course of program execution. If the two values correspond in some predetermined fashion then it is verified with a level of certainty that the program executed the program steps at or near the predetermined times.

摘要翻译： 公开了一种用于验证软件执行的硬件电路，其中电路将存储的值与在程序执行过程中至少一个预定时间存储的另一个值进行比较。如果这两个值以某种预定的方式对应，则以确定性程度验证程序在预定时间或接近预定时间执行程序步骤。

2.

发明授权
Method and system for measuring a maximum and minimum response time of a plurality of devices on a data bus and adapting the timing of read and write time slots 失效
标题翻译：用于测量数据总线上的多个设备的最大和最小响应时间并调整读取和写入时隙的定时的方法和系统

公开(公告)号：US5978927A

公开(公告)日：1999-11-02

申请号：US611036

申请日：1996-03-05

申请人： Stephen M. Curry , Wendell L. Little , David A. Bunsey, Jr.

发明人： Stephen M. Curry , Wendell L. Little , David A. Bunsey, Jr.

IPC分类号： G06F13/42 , G06F1/04

CPC分类号： G06F13/4213

摘要： In a data bus environment where a host device and a plurality of other devices are connected to the bus, the time required for the first and the last device to respond to a host request is measured. Once the time required between the first and the last response is known, then a read/write window time can be minimized thereby increasing the speed of communication over the data bus.

摘要翻译： 在主机设备和多个其他设备连接到总线的数据总线环境中，测量第一和最后一个设备响应主机请求所需的时间。一旦知道第一个和最后一个响应之间所需的时间，则可以使读/写窗口时间最小化，从而增加数据总线上的通信速度。