STORAGE SYSTEM CACHE USING FLASH MEMORY WITH DIRECT BLOCK ACCESS
    5.
    发明申请
    STORAGE SYSTEM CACHE USING FLASH MEMORY WITH DIRECT BLOCK ACCESS 有权
    使用具有直接块访问的闪存存储系统缓存

    公开(公告)号:US20130054873A1

    公开(公告)日:2013-02-28

    申请号:US13220256

    申请日:2011-08-29

    IPC分类号: G06F12/02

    摘要: Embodiments of the invention enable a storage cache, comprising flash memory devices, to have direct block access to the flash such that the physical block addresses are presented to the storage system's cache layer, which thereby controls the storage cache data stream. An aspect of the invention includes a caching storage system. The caching storage system comprises a plurality of flash memory units organized in an array configuration. Each of the plurality of flash memory units includes at least one flash memory device and a flash unit controller. Each flash unit controller provides the caching storage system with direct physical block access to its corresponding at least one flash memory device. The caching storage system further comprises a storage cache controller. The storage cache controller selects physical block address locations (within a flash memory device) to be erased where data are to be written, issues erase commands to a flash unit controller corresponding to the selected physical block address locations, and issues page write operations to a set of erase blocks.

    摘要翻译: 本发明的实施例使得包括闪速存储器设备的存储高速缓存具有对闪存的直接块访问,使得物理块地址被呈现给存储系统的高速缓存层,从而控制存储高速缓存数据流。 本发明的一个方面包括缓存存储系统。 缓存存储系统包括以阵列配置组织的多个闪存单元。 多个闪存单元中的每一个包括至少一个闪存设备和闪存单元控制器。 每个闪存单元控制器为缓存存储系统提供对其至少一个闪存设备的直接物理块访问。 高速缓存存储系统还包括存储高速缓存控制器。 存储高速缓存控制器选择要写入数据的要擦除的物理块地址位置,向与所选择的物理块地址位置对应的闪存单元控制器发出擦除命令,并将页写入操作发布到 一组擦除块。

    Storage system cache using flash memory with direct block access
    6.
    发明授权
    Storage system cache using flash memory with direct block access 有权
    存储系统缓存使用直接块访问的闪存

    公开(公告)号:US08583868B2

    公开(公告)日:2013-11-12

    申请号:US13220256

    申请日:2011-08-29

    IPC分类号: G06F12/16

    摘要: Embodiments of the invention enable a storage cache, comprising flash memory devices, to have direct block access to the flash such that the physical block addresses are presented to the storage system's cache layer, which thereby controls the storage cache data stream. An aspect of the invention includes a caching storage system. The caching storage system comprises a plurality of flash memory units organized in an array configuration. Each of the plurality of flash memory units includes at least one flash memory device and a flash unit controller. Each flash unit controller provides the caching storage system with direct physical block access to its corresponding at least one flash memory device. The caching storage system further comprises a storage cache controller. The storage cache controller selects physical block address locations (within a flash memory device) to be erased where data are to be written, issues erase commands to a flash unit controller corresponding to the selected physical block address locations, and issues page write operations to a set of erase blocks.

    摘要翻译: 本发明的实施例使得包括闪速存储器设备的存储高速缓存具有对闪存的直接块访问,使得物理块地址被呈现给存储系统的高速缓存层,从而控制存储高速缓存数据流。 本发明的一个方面包括缓存存储系统。 缓存存储系统包括以阵列配置组织的多个闪存单元。 多个闪存单元中的每一个包括至少一个闪存设备和闪存单元控制器。 每个闪存单元控制器为缓存存储系统提供对其至少一个闪存设备的直接物理块访问。 高速缓存存储系统还包括存储高速缓存控制器。 存储高速缓存控制器选择要写入数据的要擦除的物理块地址位置,向与所选择的物理块地址位置对应的闪存单元控制器发出擦除命令,并将页写入操作发布到 一组擦除块。

    MULTIPLE ERASURE CORRECTING CODES FOR STORAGE ARRAYS
    7.
    发明申请
    MULTIPLE ERASURE CORRECTING CODES FOR STORAGE ARRAYS 有权
    用于存储阵列的多个擦除修正代码

    公开(公告)号:US20120221920A1

    公开(公告)日:2012-08-30

    申请号:US13036817

    申请日:2011-02-28

    IPC分类号: G11C29/00

    CPC分类号: G06F11/108 G11C2029/0411

    摘要: Embodiments of the invention relate to erasure correcting codes for storage arrays. An aspect of the invention includes receiving a read stripe from a plurality of storage devices. The read stripe includes a block of pages arranged in rows and columns, with each column corresponding to one of the storage devices. The pages include data pages and parity pages, with the number of parity pages at least one more than the number of rows and not a multiple of the number of rows. The method further includes reconstructing at least one erased page in response to determining that the read stripe includes the at least one erased page and that the number of erased pages is less than or equal to the number of parity pages. The reconstructing is responsive to a multiple erasure correcting code and to the block of pages. The reconstructing results in a recovered read stripe.

    摘要翻译: 本发明的实施例涉及存储阵列的擦除校正码。 本发明的一个方面包括从多个存储设备接收读取条带。 读取条带包括以行和列排列的页面块,每一列对应于其中一个存储设备。 这些页面包括数据页和奇偶校验页,奇偶校验页的数量至少比行数多一个,而不是行数的倍数。 所述方法还包括响应于确定所述读取条带包括所述至少一个已擦除页面并且所述擦除页面的数量小于或等于所述奇偶校验页数来重构至少一个已擦除页面。 重建响应于多个擦除校正码和页块。 重建导致恢复的读取条带。

    Multiple erasure correcting codes for storage arrays
    8.
    发明授权
    Multiple erasure correcting codes for storage arrays 有权
    存储阵列的多个擦除校正码

    公开(公告)号:US09058291B2

    公开(公告)日:2015-06-16

    申请号:US13036817

    申请日:2011-02-28

    IPC分类号: G11C29/00 G06F11/10 G11C29/04

    CPC分类号: G06F11/108 G11C2029/0411

    摘要: Embodiments of the invention relate to erasure correcting codes for storage arrays. An aspect of the invention includes receiving a read stripe from a plurality of storage devices. The read stripe includes a block of pages arranged in rows and columns, with each column corresponding to one of the storage devices. The pages include data pages and parity pages, with the number of parity pages at least one more than the number of rows and not a multiple of the number of rows. The method further includes reconstructing at least one erased page in response to determining that the read stripe includes the at least one erased page and that the number of erased pages is less than or equal to the number of parity pages. The reconstructing is responsive to a multiple erasure correcting code and to the block of pages. The reconstructing results in a recovered read stripe.

    摘要翻译: 本发明的实施例涉及存储阵列的擦除校正码。 本发明的一个方面包括从多个存储设备接收读取条带。 读取条带包括以行和列排列的页面块,每一列对应于其中一个存储设备。 这些页面包括数据页和奇偶校验页,奇偶校验页的数量至少比行数多一个,而不是行数的倍数。 所述方法还包括响应于确定所述读取条带包括所述至少一个已擦除页面并且所述擦除页面的数量小于或等于所述奇偶校验页数来重构至少一个已擦除页面。 重建响应于多个擦除校正码和页块。 重建导致恢复的读取条带。

    SCSI device translator for network
    9.
    发明授权
    SCSI device translator for network 有权
    用于网络的SCSI设备翻译器

    公开(公告)号:US07783783B2

    公开(公告)日:2010-08-24

    申请号:US10102930

    申请日:2002-03-22

    IPC分类号: G06F15/16

    摘要: A system and method for interfacing a non-SCSI device to a computer network for communicating with a SCSI device attached to the computer network is disclosed. An interface receives a SCSI-based communication message from the network that is intended for the non-SCSI device. The SCSI-based communication can be formatted for transport over, for example, a TCP/IP transport stream and includes, for example, a command descriptor block and accompanying data. A translator device converts a first SCSI-based communication message to a corresponding first non-SCSI communication message that is recognizable by the non-SCSI device. A translator device also receives a second non-SCSI communication message from the non-SCSI device and converts the second non-SCSI communication message into a corresponding second SCSI-based communication message. The interface device, responsive to the second SCSI-based communication message, sends the second SCSI based communication message to the network.

    摘要翻译: 公开了一种用于将非SCSI设备连接到计算机网络以与连接到计算机网络的SCSI设备进行通信的系统和方法。 接口从网络接收用于非SCSI设备的基于SCSI的通信消息。 基于SCSI的通信可以被格式化以用于例如TCP / IP传输流的传输,并且包括例如命令描述符块和伴随的数据。 翻译器设备将第一基于SCSI的通信消息转换成可由非SCSI设备识别的对应的第一非SCSI通信消息。 翻译设备还从非SCSI设备接收第二非SCSI通信消息,并将第二非SCSI通信消息转换为对应的第二基于SCSI的通信消息。 响应于第二基于SCSI的通信消息的接口设备将第二基于SCSI的通信消息发送到网络。

    INCOMPLETE WRITE PROTECTION FOR DISK ARRAY

    公开(公告)号:US20080276146A1

    公开(公告)日:2008-11-06

    申请号:US12059011

    申请日:2008-03-31

    IPC分类号: H03M13/05 G06F11/10

    摘要: The embodiments of the invention provide methods of protecting data blocks while writing to a storage array, wherein storage units in the storage array include write logs. The data protection level of the write logs is equal to or greater than the data protection level of the storage units. Moreover, the write logs have metadata describing contents of the write logs, wherein the metadata include a sequence number identifying the age of the metadata. Each of the data blocks is a member of a parity group having addressable data blocks and first parity blocks. The addressable data blocks have at least one host data block and at least one associated data block.