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1.发明授权SiGe heterojunction bipolar transistor and method of forming a SiGe heterojunction bipolar transistor 有权SiGe异质结双极晶体管和形成SiGe异质结双极晶体管的方法公开(公告)号：US08377788B2
公开(公告)日：2013-02-19
申请号：US12946305
申请日：2010-11-15
IPC分类号： H01L21/331
CPC分类号： H01L29/66242 , H01L29/0649 , H01L29/1004 , H01L29/7371
摘要： A SiGe heterojunction bipolar transistor is fabricated by etching an epitaxially-formed structure to form a mesa that has a collector region, a cap region, and a notched SiGe base region that lies in between. A protective plug is formed in the notch of the SiGe base region so that thick non-conductive regions can be formed on the sides of the collector region and the cap region. Once the non-conductive regions have been formed, the protective plug is removed. An extrinsic base is then formed to lie in the notch and touch the base region, followed by the formation of isolation regions and an emitter region.
摘要翻译： 通过蚀刻外延形成的结构来形成SiGe异质结双极晶体管，以形成具有位于其间的集电极区域，帽区域和缺口SiGe基极区域的台面。 在SiGe基极区域的凹口中形成保护塞，使得可以在集电区域和盖区域的侧面上形成厚的非导电区域。 一旦形成了非导电区域，就去除了保护塞。 然后形成外部碱基以位于凹口中并且接触基极区域，随后形成隔离区域和发射极区域。
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2.发明申请SiGe Heterojunction Bipolar Transistor and Method of Forming a SiGe Heterojunction Bipolar Transistor 有权SiGe异质结双极晶体管和形成SiGe异质结双极晶体管的方法公开(公告)号：US20120119262A1
公开(公告)日：2012-05-17
申请号：US12946305
申请日：2010-11-15
IPC分类号： H01L29/73 , H01L21/331
CPC分类号： H01L29/66242 , H01L29/0649 , H01L29/1004 , H01L29/7371
摘要： A SiGe heterojunction bipolar transistor is fabricated by etching an epitaxially-formed structure to form a mesa that has a collector region, a cap region, and a notched SiGe base region that lies in between. A protective plug is formed in the notch of the SiGe base region so that thick non-conductive regions can be formed on the sides of the collector region and the cap region. Once the non-conductive regions have been formed, the protective plug is removed. An extrinsic base is then formed to lie in the notch and touch the base region, followed by the formation of isolation regions and an emitter region.
摘要翻译： 通过蚀刻外延形成的结构来形成SiGe异质结双极晶体管，以形成具有位于其间的集电极区域，帽区域和缺口SiGe基极区域的台面。 在SiGe基极区域的凹口中形成保护塞，使得可以在集电区域和盖区域的侧面上形成厚的非导电区域。 一旦形成了非导电区域，就去除了保护塞。 然后形成外部碱基以位于凹口中并且接触基极区域，随后形成隔离区域和发射极区域。
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3.发明申请公开(公告)号：US20070052059A1
公开(公告)日：2007-03-08
申请号：US11592800
申请日：2006-11-03
申请人： Andre Labonte , Lee Jacobson
发明人： Andre Labonte , Lee Jacobson
CPC分类号： B81C1/00547 , B81C2201/0132 , H01L27/14625 , H01L27/14685
摘要： A single, controlled etch step can be used to form a sharp tip feature along a sidewall of an etch feature. An etch process is used that is selective to a layer of tip material relative to the substrate upon which the layer is deposited. A lag can be created in the etch, such that the etch rate is slower near the sidewall. The sharp tip feature is formed from the same layer of material used to create the etch feature. The sharp tip feature can be used to decrease the minimum critical dimension of an etch process, such as may be due to the minimum resolution of a photolithographic process. The novel tip feature also can be used for other applications, such as to create a microaperture for a photosensitive device, or to create a micromold that can be used to form objects such as microlenses.
摘要翻译： 可以使用单个受控蚀刻步骤沿着蚀刻特征的侧壁形成尖锐的尖端特征。 使用对相对于沉积该层的衬底的尖端材料层是有选择性的蚀刻工艺。 可以在蚀刻中产生滞后，使得蚀刻速率在侧壁附近较慢。 尖端特征由用于产生蚀刻特征的相同材料层形成。 尖锐特征可用于降低蚀刻工艺的最小临界尺寸，例如可能是由于光刻工艺的最小分辨率。 该新颖的尖端特征也可以用于其它应用，例如为感光装置创建微孔，或者创建可用于形成诸如微透镜的物体的微镜。
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