公开(公告)号：US10305470B1

公开(公告)日：2019-05-28

申请号：US16030778

申请日：2018-07-09

Applicant: Winbond Electronics Corp.

Inventor： Oron Michael ,  Dae Hyun Kim

IPC: H03K17/22 ,  H03L7/00 ,  H03K19/20

Abstract: In an aspect, the disclosure is directed to a circuit which includes not limited to a memory circuit which includes a first memory element outputting a first memory output voltage and a second memory element outputting a second memory output voltage; a logical comparator circuit which is connected to the memory circuit and includes a first logical comparator which compares the first memory output voltage with a first power supply voltage to generate a first logical comparator output voltage and a second logical comparator which compares the second memory output voltage with a second power supply voltage to generate a second logical comparator output voltage; and a logical circuit which is electronically connected to the logical comparator circuit and receives a first logical comparator output voltage and a second logical comparator output voltage to perform a first logical operation which is used at least in part to generate a power on reset voltage.

公开(公告)号：US10249346B2

公开(公告)日：2019-04-02

申请号：US15649632

申请日：2017-07-13

Applicant: Winbond Electronics Corp.

Inventor： Oron Michael ,  Dae Hyun Kim

IPC: G11C5/14 ,  H02M3/07

Abstract: A power supply includes a plurality of charge pump circuits. The charge pump circuits commonly generate an output voltage for programming a write data to the memory apparatus. Wherein, number of the charge pump circuits enabled for generating the output voltage is determined according to number of programmed bit(s) of the write data.

公开(公告)号：US20190019539A1

公开(公告)日：2019-01-17

申请号：US15649632

申请日：2017-07-13

Applicant: Winbond Electronics Corp.

Inventor： Oron Michael ,  Dae Hyun Kim

IPC: G11C5/14 ,  H02M3/07

Abstract: A power supply includes a plurality of charge pump circuits. The charge pump circuits commonly generate an output voltage for programming a write data to the memory apparatus. Wherein, number of the charge pump circuits enabled for generating the output voltage is determined according to number of programmed bit(s) of the write data.