公开(公告)号：US20230138706A1

公开(公告)日：2023-05-04

申请号：US17516476

申请日：2021-11-01

Applicant: X Development LLC

Inventor： Raj Apte ,  Cyrus Behroozi ,  Kathryn Heal ,  Owen Lewis ,  Zhigang Pan ,  Dino Ruic

IPC: G06F30/398 ,  G06F30/27 ,  G06F30/323

Abstract: Embodiments of a system and method for generating integrated circuit layouts are described herein. A computer implemented method for generating integrated circuit layouts includes receiving a first layout for an integrated circuit, segmenting the first layout into a plurality of different patches, each patch of the plurality of patches describing a discrete portion of the first layout, identifying a non-compliant patch of the plurality of patches, the non-compliant patch violating a design rule governing the manufacture of the integrated circuit, generating a transformation of the non-compliant patch using a machine learning model, and generating a second layout using the transformation and the first layout, where the second layout is compliant with the design rule.

公开(公告)号：US11675960B2

公开(公告)日：2023-06-13

申请号：US17516476

申请日：2021-11-01

Applicant: X Development LLC

Inventor： Raj Apte ,  Cyrus Behroozi ,  Kathryn Heal ,  Owen Lewis ,  Zhigang Pan ,  Dino Ruic

IPC: G06F30/398 ,  G06F30/323 ,  G06F30/27

CPC classification number: G06F30/398 ,  G06F30/27 ,  G06F30/323

Abstract: Embodiments of a system and method for generating integrated circuit layouts are described herein. A computer implemented method for generating integrated circuit layouts includes receiving a first layout for an integrated circuit, segmenting the first layout into a plurality of different patches, each patch of the plurality of patches describing a discrete portion of the first layout, identifying a non-compliant patch of the plurality of patches, the non-compliant patch violating a design rule governing the manufacture of the integrated circuit, generating a transformation of the non-compliant patch using a machine learning model, and generating a second layout using the transformation and the first layout, where the second layout is compliant with the design rule.