公开(公告)号：US20240178087A1

公开(公告)日：2024-05-30

申请号：US18070380

申请日：2022-11-28

Applicant: XILINX, INC.

Inventor： Li-Sheng WENG ,  Alexander Helmut PFEIFFENBERGER

IPC: H01L23/31 ,  H01L25/00 ,  H01L25/16

CPC classification number: H01L23/3114 ,  H01L23/3128 ,  H01L25/162 ,  H01L25/50

Abstract: Chip packages are described herein that includes integrated passive devices embedded in a core of a substrate of the chip package, such as a package substrate or an interposer, that shield routings coupled to inductors from adjacent through-substrate conductive paths (e.g., vias). In one example, a chip package includes an integrated circuit (IC) die mounted to a substrate. A core of the substrate has a plurality of inductor routing vias, a plurality of signal transmission vias, and a plurality of ground and power routing vias. A first integrated passive device (IPD) is disposed in the core and separates at least one of the plurality of inductor routing vias from an adjacent via, the adjacent via being one of the plurality of signal transmission vias or one of the plurality of ground and power routing vias.