公开(公告)号：US20220224337A1

公开(公告)日：2022-07-14

申请号：US17709164

申请日：2022-03-30

Applicant: XILINX, INC.

Inventor： John Edward MCGRATH ,  Woon WONG ,  John O'DWYER ,  Paul NEWSON ,  Brendan FARLEY

IPC: H03K19/1776

Abstract: An example programmable device includes a configuration memory configured to store configuration data; a programmable logic having a configurable functionality based on the configuration data in the configuration memory; a signal conversion circuit; a digital processing circuit; an endpoint circuit coupled to the signal conversion circuit through the digital processing circuit; wherein the digital processing circuit includes a first one or more digital processing functions implemented as hardened circuits each having a predetermined functionality, and a second one or more processing functions implemented by the configurable functionality of the programmable logic.

公开(公告)号：US20220224338A1

公开(公告)日：2022-07-14

申请号：US17709167

申请日：2022-03-30

Applicant: XILINX, INC.

Inventor： John Edward MCGRATH ,  Woon WONG ,  John O'DWYER ,  Paul NEWSON ,  Brendan FARLEY

IPC: H03K19/1776

Abstract: An example programmable device includes a configuration memory configured to store configuration data; a programmable logic having a configurable functionality based on the configuration data in the configuration memory; a signal conversion circuit; a digital processing circuit; an endpoint circuit coupled to the signal conversion circuit through the digital processing circuit; wherein the digital processing circuit includes a first one or more digital processing functions implemented as hardened circuits each having a predetermined functionality, and a second one or more processing functions implemented by the configurable functionality of the programmable logic.

公开(公告)号：US20220060189A1

公开(公告)日：2022-02-24

申请号：US17453310

申请日：2021-11-02

Applicant: XILINX, INC.

Inventor： John Edward MCGRATH ,  Woon WONG ,  John O'DWYER ,  Paul NEWSON ,  Brendan FARLEY

IPC: H03K19/1776

Abstract: An example programmable device includes a configuration memory configured to store configuration data; a programmable logic having a configurable functionality based on the configuration data in the configuration memory; a signal conversion circuit; a digital processing circuit; an endpoint circuit coupled to the signal conversion circuit through the digital processing circuit; wherein the digital processing circuit includes a first one or more digital processing functions implemented as hardened circuits each having a predetermined functionality, and a second one or more processing functions implemented by the configurable functionality of the programmable logic.