公开(公告)号：US20230023866A1

公开(公告)日：2023-01-26

申请号：US17750297

申请日：2022-05-20

Applicant: XILINX, INC.

Inventor： Richard Lewis WALKE ,  John Edward MCGRATH

IPC: G11C7/10 ,  G11C8/16

Abstract: Embodiments herein describe a multi-port memory system that includes one or more single port memories (e.g., a memory that can perform only one read or one write at any given time, referred to as a 1W or 1R memory). That is, the multi-port memory system can perform multiple read and writes in parallel (e.g., 1R/1W, 1R/3W, 2R/2W, 3R/1W, etc.) even though the memory in the system can only perform one read or one write at any given time. The advantage of doing so is a reduction in area and power.

公开(公告)号：US20220224337A1

公开(公告)日：2022-07-14

申请号：US17709164

申请日：2022-03-30

Applicant: XILINX, INC.

Inventor： John Edward MCGRATH ,  Woon WONG ,  John O'DWYER ,  Paul NEWSON ,  Brendan FARLEY

IPC: H03K19/1776

Abstract: An example programmable device includes a configuration memory configured to store configuration data; a programmable logic having a configurable functionality based on the configuration data in the configuration memory; a signal conversion circuit; a digital processing circuit; an endpoint circuit coupled to the signal conversion circuit through the digital processing circuit; wherein the digital processing circuit includes a first one or more digital processing functions implemented as hardened circuits each having a predetermined functionality, and a second one or more processing functions implemented by the configurable functionality of the programmable logic.

公开(公告)号：US20220294598A1

公开(公告)日：2022-09-15

申请号：US17199193

申请日：2021-03-11

Applicant: XILINX, INC.

Inventor： John Edward MCGRATH ,  Gourav MODI ,  Rhona WADE

IPC: H04L5/14 ,  H03D7/00 ,  H03K19/177

Abstract: Embodiments herein describe an integrated circuit with a digital front end (DFE) that includes multiple hardened mixers that can be configured to support multiple different radio paths. The DFE provides the ability to distribute the processing across the multiple mixers, which can be combined and synchronized to create a larger mixer or may be used in other combinations to create multiple discrete mixers.

公开(公告)号：US20220224338A1

公开(公告)日：2022-07-14

申请号：US17709167

申请日：2022-03-30

Applicant: XILINX, INC.

Inventor： John Edward MCGRATH ,  Woon WONG ,  John O'DWYER ,  Paul NEWSON ,  Brendan FARLEY

IPC: H03K19/1776

Abstract: An example programmable device includes a configuration memory configured to store configuration data; a programmable logic having a configurable functionality based on the configuration data in the configuration memory; a signal conversion circuit; a digital processing circuit; an endpoint circuit coupled to the signal conversion circuit through the digital processing circuit; wherein the digital processing circuit includes a first one or more digital processing functions implemented as hardened circuits each having a predetermined functionality, and a second one or more processing functions implemented by the configurable functionality of the programmable logic.

公开(公告)号：US20220060189A1

公开(公告)日：2022-02-24

申请号：US17453310

申请日：2021-11-02

Applicant: XILINX, INC.

Inventor： John Edward MCGRATH ,  Woon WONG ,  John O'DWYER ,  Paul NEWSON ,  Brendan FARLEY

IPC: H03K19/1776

Abstract: An example programmable device includes a configuration memory configured to store configuration data; a programmable logic having a configurable functionality based on the configuration data in the configuration memory; a signal conversion circuit; a digital processing circuit; an endpoint circuit coupled to the signal conversion circuit through the digital processing circuit; wherein the digital processing circuit includes a first one or more digital processing functions implemented as hardened circuits each having a predetermined functionality, and a second one or more processing functions implemented by the configurable functionality of the programmable logic.