COMPILING A TENSOR TILING SPECIFICATION TO MULTI-DIMENSIONAL DATA MOVER CIRCUIT CONFIGURATIONS

    公开(公告)号:US20250005246A1

    公开(公告)日:2025-01-02

    申请号:US18345393

    申请日:2023-06-30

    Applicant: Xilinx, Inc.

    Abstract: Compiling a tensor specification for multi-dimensional direct memory access circuit configurations includes generating a first list of tile combination objects from a tensor tiling specification. The first list specifies a sequence of tiles specified by the tensor tiling specification in which each tile object represents a single tile of a tensor data structure. A second list of tile combination objects is generated by combining selected ones of the tile combination objects from the first list. Each tile combination object of the second list represents one or more tile objects. The tile combination objects of the second list are converted into buffer descriptor objects that include buffer descriptor parameters. Each of the buffer descriptor objects that is non-compliant with hardware constraints corresponding to a data mover circuit that is configurable using the buffer descriptor objects is legalized. The buffer descriptor objects are output, as legalized.

    Control and reconfiguration of data flow graphs on heterogeneous computing platform

    公开(公告)号:US11687327B2

    公开(公告)日:2023-06-27

    申请号:US17695895

    申请日:2022-03-16

    Applicant: XILINX, INC.

    CPC classification number: G06F8/433 G06F9/54 G06F11/3495 G06F16/9024

    Abstract: Embodiments herein use control application programming interfaces (APIs) to control the execution of a dataflow graph in a heterogeneous processing system. That is, embodiments herein describe a programming model along with associated APIs and methods that can control, interact, and at least partially reconfigure a user application (e.g., the dataflow graph) executing on the heterogeneous processing system through a local executing control program. Using the control APIs, users can manipulate such remotely executing graphs directly as local objects and perform control operations on them (e.g., for loading and initializing the graphs; dynamically adjusting parameters for adaptive control; monitoring application parameters, system states and events; scheduling operations to read and write data across the distributed memory boundary of the platform; controlling the execution life-cycle of a subsystem; and partially reconfiguring the computing resources for a new subsystem).

    Control and reconfiguration of data flow graphs on heterogeneous computing platform

    公开(公告)号:US10802807B1

    公开(公告)日:2020-10-13

    申请号:US16420840

    申请日:2019-05-23

    Applicant: Xilinx, Inc.

    Abstract: Embodiments herein use control application programming interfaces (APIs) to control the execution of a dataflow graph in a heterogeneous processing system. That is, embodiments herein describe a programming model along with associated APIs and methods that can control, interact, and at least partially reconfigure a user application (e.g., the dataflow graph) executing on the heterogeneous processing system through a local executing control program. Using the control APIs, users can manipulate such remotely executing graphs directly as local objects and perform control operations on them (e.g., for loading and initializing the graphs; dynamically adjusting parameters for adaptive control; monitoring application parameters, system states and events; scheduling operations to read and write data across the distributed memory boundary of the platform; controlling the execution life-cycle of a subsystem; and partially reconfiguring the computing resources for a new subsystem).

    Implementing data flows of an application across a memory hierarchy of a data processing array

    公开(公告)号:US12159057B2

    公开(公告)日:2024-12-03

    申请号:US17934153

    申请日:2022-09-21

    Applicant: Xilinx, Inc.

    Abstract: Implementing data flows of an application across a memory hierarchy of a data processing array includes receiving a data flow graph specifying an application for execution on the data processing array. A plurality of buffer objects corresponding to a plurality of different levels of the memory hierarchy of the data processing array and an external memory are identified. The plurality of buffer objects specify data flows. Buffer object parameters are determined. The buffer object parameters define properties of the data flows. Data that configures the data processing array to implement the data flows among the plurality of different levels of the memory hierarchy and the external memory is generated based on the plurality of buffer objects and the buffer object parameters.

    Modeling and compiling tensor processing applications for a computing platform using multi-layer adaptive data flow graphs

    公开(公告)号:US12135990B2

    公开(公告)日:2024-11-05

    申请号:US18091907

    申请日:2022-12-30

    Applicant: XILINX, INC.

    Abstract: Modeling and compiling tensor processing applications using multi-layer adaptive data flow (ML-ADF) graphs, including folding the ML-ADF graph for temporal sharing of platform resources, computing schedules for runtime orchestration of kernel execution, memory reuse, tensor and sub-volume movement, and dataflow synchronization, and generating binary code for processors of the target computing platform and re-targetable controller code. The ML-ADF graph may represent: tensor processing of a layer of a neural network as data flow through the data nodes and distribution to compute tiles across memory hierarchy; data flow amongst layers of the neural network using connections amongst data nodes of the respective layers; and multi-dimension data partitioning and distribution using tiling parameters associated with ports of the data nodes.

    IMPLEMENTING DATA FLOWS OF AN APPLICATION ACROSS A MEMORY HIERARCHY OF A DATA PROCESSING ARRAY

    公开(公告)号:US20240094944A1

    公开(公告)日:2024-03-21

    申请号:US17934153

    申请日:2022-09-21

    Applicant: Xilinx, Inc.

    CPC classification number: G06F3/0656 G06F3/0622 G06F3/0683

    Abstract: Implementing data flows of an application across a memory hierarchy of a data processing array includes receiving a data flow graph specifying an application for execution on the data processing array. A plurality of buffer objects corresponding to a plurality of different levels of the memory hierarchy of the data processing array and an external memory are identified. The plurality of buffer objects specify data flows. Buffer object parameters are determined. The buffer object parameters define properties of the data flows. Data that configures the data processing array to implement the data flows among the plurality of different levels of the memory hierarchy and the external memory is generated based on the plurality of buffer objects and the buffer object parameters.

    Control and reconfiguration of data flow graphs on heterogeneous computing platform

    公开(公告)号:US11281440B1

    公开(公告)日:2022-03-22

    申请号:US17065433

    申请日:2020-10-07

    Applicant: XILINX, INC.

    Abstract: Embodiments herein use control application programming interfaces (APIs) to control the execution of a dataflow graph in a heterogeneous processing system. That is, embodiments herein describe a programming model along with associated APIs and methods that can control, interact, and at least partially reconfigure a user application (e.g., the dataflow graph) executing on the heterogeneous processing system through a local executing control program. Using the control APIs, users can manipulate such remotely executing graphs directly as local objects and perform control operations on them (e.g., for loading and initializing the graphs; dynamically adjusting parameters for adaptive control; monitoring application parameters, system states and events; scheduling operations to read and write data across the distributed memory boundary of the platform; controlling the execution life-cycle of a subsystem; and partially reconfiguring the computing resources for a new subsystem).

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