公开(公告)号：US11443088B1

公开(公告)日：2022-09-13

申请号：US16897899

申请日：2020-06-10

Applicant: Xilinx, Inc.

Inventor： Gaurav Kumar Verma ,  Saikat Bandyopadhyay

IPC: G06F11/26 ,  G06F9/44 ,  G06F30/331 ,  G06F16/901 ,  G06F9/30 ,  G06F9/46 ,  G06F16/22 ,  G06F16/955 ,  G06F16/23 ,  G06F16/9535 ,  G06F16/951 ,  G06F9/4401 ,  G06F16/28 ,  G06F9/54

Abstract: Simulation of a circuit design using accelerated models can include determining, using computer hardware, that a design unit of a circuit design specified in a hardware description language is a prime block and determining, using the computer hardware, an output vector corresponding to an output of the prime block. Using the computer hardware, contents of the prime block can be replaced with an accelerated simulation model specified in a high level language, wherein the accelerated simulation model can determine a value for the output of the prime block as a function of values of one or more inputs of the prime block using the output vector. Using the computer hardware, the circuit design can be elaborated and compiled into object code that is executable to simulate the circuit design.