公开(公告)号：US08769448B1

公开(公告)日：2014-07-01

申请号：US13747940

申请日：2013-01-23

Applicant: Xilinx, Inc.

Inventor： Arvind Sundararajan ,  Nabeel Shirazi ,  Sean P. Caffee

IPC: G06F17/50

CPC classification number: G06F17/5022

Abstract: In one embodiment, a method is provided for processing a circuit design having first and second sets of ports configured to couple to respective first and second sets of ports of a device on a hardware platform. In a data-acquisition mode, the circuit design is simulated using a user-selectable plug-in that couples the ports of the circuit design to an interface circuit. During the simulation, the interface circuit communicates data between respective ports of the circuit design and ports of the device. In a deployment mode, the circuit design is implemented in the hardware platform, in which the first and second sets of ports of the circuit design are respectively coupled to the first and second sets of ports of the device.

Abstract translation: 在一个实施例中，提供了一种用于处理电路设计的方法，该电路设计具有配置成耦合到硬件平台上的设备的相应第一和第二组端口的第一和第二组端口。 在数据采集模式下，使用用户可选择的插件来模拟电路设计，该插件将电路设计的端口耦合到接口电路。 在仿真期间，接口电路在电路设计的各个端口和设备的端口之间传送数据。 在部署模式中，电路设计在硬件平台中实现，其中电路设计的第一和第二组端口分别耦合到设备的第一和第二组端口。