公开(公告)号：US12099790B1

公开(公告)日：2024-09-24

申请号：US17204431

申请日：2021-03-17

Applicant: Xilinx, Inc.

Inventor： Raghukul B. Dikshit ,  Tauheed Ashraf ,  Michael Chyziak

IPC: G06F30/331 ,  H04J3/06

CPC classification number: G06F30/331 ,  H04J3/06

Abstract: An emulation system can include a first integrated circuit (IC) including first circuitry and a first transceiver. The first circuitry is configured to emulate a first partition of a circuit design. The first circuitry is clocked by an emulation clock and the first transceiver is clocked by a transceiver clock asynchronous with the emulation clock. The transceiver clock has a higher frequency than the emulation clock. The emulation system can include a second IC configured to emulate a second partition of the circuit design. The second IC includes a second transceiver. The first transceiver is configured to generate multiplexed emulation data by multiplexing a plurality of nets that cross from the first partition to the second partition of the circuit design. The first transceiver is configured to send the multiplexed emulation data over a serial communication channel to the second transceiver. The multiplexed emulation data includes a clock signal of the first transceiver embedded therein.