公开(公告)号：US10789402B1

公开(公告)日：2020-09-29

申请号：US16400690

申请日：2019-05-01

Applicant: Xilinx, Inc.

Inventor： Kumar S. S. Vemuri ,  Abid Karumannil ,  Venkataraju Koppada ,  Anitha Barri ,  Anusha Perla ,  Vishal K. Jain ,  Sairam K. M. Menon ,  Anil K. Martha

IPC: G06F30/327 ,  G06N3/04 ,  G06N3/063 ,  G06N3/08

Abstract: Examples herein describe a method for a compiler and hardware-abstraction-layer architecture for a programmable integrated circuit (IC). In one embodiment, a method for mapping and porting a neural network to an integrated circuit (IC) is disclosed. The method includes receiving a network description of the neural network; generating a framework independent network graph based on the network description; performing a plurality of back-end operations on the network graph to generate an execution sequence vector; and configuring the IC based on the execution sequence vector.