公开(公告)号：US11043470B2

公开(公告)日：2021-06-22

申请号：US16694476

申请日：2019-11-25

Applicant: XILINX, INC.

Inventor： Jing Jing ,  Shuxian Wu ,  Xin X. Wu ,  Yohan Frans

IPC: H01L25/065 ,  H01L23/64 ,  H01L23/522 ,  H01L25/00 ,  H01L49/02 ,  H01L21/48 ,  H01L23/538

Abstract: Examples described herein provide for an isolation design for an inductor of a stacked integrated circuit device. An example is a multi-chip device comprising a chip stack comprising: a plurality of chips, neighboring pairs of the plurality of chips being bonded together, each chip comprising a semiconductor substrate, and a front side dielectric layer on a front side of the semiconductor substrate; an inductor disposed in a backside dielectric layer of a first chip of the plurality of chips, the backside dielectric layer being on a backside of the semiconductor substrate of the first chip opposite from the front side of the semiconductor substrate of the first chip; and an isolation wall extending from the backside dielectric layer of the first chip to the front side dielectric layer, the isolation wall comprising a through substrate via of the first chip, the isolation wall being disposed around the inductor.

公开(公告)号：US20180076134A1

公开(公告)日：2018-03-15

申请号：US15267035

申请日：2016-09-15

Applicant: Xilinx, Inc.

Inventor： Jing Jing ,  Shuxian Wu ,  Xin X. Wu ,  Parag Upadhyaya

IPC: H01L23/522 ,  H01L49/02 ,  H01L21/768 ,  H01L23/64

CPC classification number: H01L23/5227 ,  H01L23/5225 ,  H01L23/645 ,  H01L28/10

Abstract: A semiconductor device includes an interconnect structure disposed over a semiconductor substrate. The interconnect structure includes a first device disposed in a first portion of the interconnect structure. A first shielding plane including a first conductive material is disposed in a second portion of the interconnect structure over the first portion of the interconnect structure. A second device is disposed in a third portion of the interconnect structure over the second portion of the interconnect structure. An isolation wall including a second conductive material is disposed in the first, second, and third portions of the interconnect structure. The isolation wall is coupled to the first shielding plane, and surrounds the first device, the first shielding plane, and the second device.