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公开(公告)号：US09547734B2
公开(公告)日：2017-01-17
申请号：US13596214
申请日：2012-08-28
IPC分类号： G06F17/50
CPC分类号： G06F17/5036 , G06F17/5063 , G06F17/5068
摘要： Among other things, one or more techniques for creating an array model for analog device modeling are provided. In an embodiment, the array model represents a mean value or a standard deviation value of an analog device characteristic for an analog device based on a physical location of the analog device within a circuit layout, where the physical location is identified using a physical set of coordinates. The physical set of coordinates maps to an array set of coordinates of the array model. In this manner, a mean value and a standard deviation value are obtainable from the array model using the array set of coordinates. The mean value and the standard deviation value are usable to model the analog device, and thus a circuit within which the analog device is used, to obtain a more accurate or realistic prediction of operation or behavior, for example.
摘要翻译： 提供了一种或多种用于创建用于模拟设备建模的阵列模型的技术。 在一个实施例中，阵列模型表示基于电路布局内的模拟设备的物理位置的模拟设备的模拟设备特性的平均值或标准偏差值，其中使用物理位置 坐标 物理坐标系映射到数组模型的坐标数组。 以这种方式，可以使用阵列坐标系从阵列模型中获得平均值和标准偏差值。 平均值和标准偏差值可用于对模拟装置进行建模，并因此对使用模拟装置的电路进行建模，以获得例如操作或行为的更准确或更现实的预测。
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公开(公告)号：US20140067348A1
公开(公告)日：2014-03-06
申请号：US13596214
申请日：2012-08-28
IPC分类号： G06G7/48
CPC分类号： G06F17/5036 , G06F17/5063 , G06F17/5068
摘要： Among other things, one or more techniques for creating an array model for analog device modeling are provided. In an embodiment, the array model represents a mean value or a standard deviation value of an analog device characteristic for an analog device based on a physical location of the analog device within a circuit layout, where the physical location is identified using a physical set of coordinates. The physical set of coordinates maps to an array set of coordinates of the array model. In this manner, a mean value and a standard deviation value are obtainable from the array model using the array set of coordinates. The mean value and the standard deviation value are usable to model the analog device, and thus a circuit within which the analog device is used, to obtain a more accurate or realistic prediction of operation or behavior, for example.
摘要翻译： 提供了一种或多种用于创建用于模拟设备建模的阵列模型的技术。 在一个实施例中，阵列模型表示基于电路布局内的模拟设备的物理位置的模拟设备的模拟设备特性的平均值或标准偏差值，其中使用物理位置 坐标 物理坐标系映射到数组模型的坐标数组。 以这种方式，可以使用阵列坐标系从阵列模型中获得平均值和标准偏差值。 平均值和标准偏差值可用于对模拟装置进行建模，并因此对使用模拟装置的电路进行建模，以获得例如操作或行为的更准确或更现实的预测。
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公开(公告)号：US20130049810A1
公开(公告)日：2013-02-28
申请号：US13221628
申请日：2011-08-30
IPC分类号： H03D13/00
摘要： A time to current conversion apparatus and methods. An impedance having an input for selectively receiving a time varying periodic signal or a known voltage signal is provided; and a current output is coupled to the impedance. By observing the average current through the impedance for the known voltage signal over a time period, and by observing the average current through the impedance for a time varying periodic signal, the duty cycle of the time varying periodic signal may be determined by evaluating a ratio of a first average current observed at the current output while the time varying periodic signal is coupled to the impedance to a second average current observed at the current output while the known voltage signal is coupled to the impedance. An embodiment time to current converter circuit is disclosed. Method embodiments for determining the duty cycle of a time varying periodic signal are provided.
摘要翻译： 一个时间到当前的转换设备和方法。 提供具有用于选择性地接收时变周期信号或已知电压信号的输入的阻抗; 并且电流输出耦合到阻抗。 通过在一段时间内观察已知电压信号的阻抗的平均电流，并且通过观察时变周期信号的通过阻抗的平均电流，可以通过评估时变周期信号的占空比来确定时变周期信号的占空比 在电流输出处观察到的第一平均电流，而当所述已知电压信号耦合到所述阻抗时，所述时变周期信号与所述阻抗耦合到在所述电流输出处观察到的第二平均电流。 公开了一种实时的电流转换器电路。 提供了用于确定时变周期信号的占空比的方法实施例。
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公开(公告)号：US20130270671A1
公开(公告)日：2013-10-17
申请号：US13602471
申请日：2012-09-04
申请人： Chung-Ting Lu , Chih-Chiang Chang
发明人： Chung-Ting Lu , Chih-Chiang Chang
CPC分类号： H01L27/016 , G06F17/5036 , H01L27/0805
摘要： Some embodiments relate a capacitor array arranged on a semiconductor substrate. The capacitor array includes an array of unit capacitors arranged in a series of rows and columns. An interconnect structure couples unit capacitors of the array to establish a plurality of capacitor elements. The respective capacitor elements have different numbers of unit capacitors and different corresponding capacitances. In establishing the plurality of capacitor elements, the interconnect structure couples unit capacitors of the array in substantially identical sub-arrays tiled over the semiconductor substrate. Other methods and devices are also disclosed.
摘要翻译： 一些实施例涉及布置在半导体衬底上的电容器阵列。 电容器阵列包括布置成一系列行和列的单元电容器阵列。 互连结构耦合阵列的单元电容器以建立多个电容器元件。 各个电容器元件具有不同数量的单位电容器和不同的对应电容。 在建立多个电容器元件时，互连结构将平行于半导体衬底上的基本相同的子阵列中的阵列的单元电容器耦合。 还公开了其它方法和装置。
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公开(公告)号：US08664978B2
公开(公告)日：2014-03-04
申请号：US13221628
申请日：2011-08-30
摘要： A time to current conversion apparatus and methods. An impedance having an input for selectively receiving a time varying periodic signal or a known voltage signal is provided; and a current output is coupled to the impedance. By observing the average current through the impedance for the known voltage signal over a time period, and by observing the average current through the impedance for a time varying periodic signal, the duty cycle of the time varying periodic signal may be determined by evaluating a ratio of a first average current observed at the current output while the time varying periodic signal is coupled to the impedance to a second average current observed at the current output while the known voltage signal is coupled to the impedance. An embodiment time to current converter circuit is disclosed. Method embodiments for determining the duty cycle of a time varying periodic signal are provided.
摘要翻译： 一个时间到当前的转换设备和方法。 提供具有用于选择性地接收时变周期信号或已知电压信号的输入的阻抗; 并且电流输出耦合到阻抗。 通过在一段时间内观察已知电压信号的阻抗的平均电流，并且通过观察时变周期信号的通过阻抗的平均电流，可以通过评估时变周期信号的占空比来确定时变周期信号的占空比 在电流输出处观察到的第一平均电流，而当所述已知电压信号耦合到所述阻抗时，所述时变周期信号与所述阻抗耦合到在所述电流输出处观察到的第二平均电流。 公开了一种实时的电流转换器电路。 提供了用于确定时变周期信号的占空比的方法实施例。
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公开(公告)号：US08643141B2
公开(公告)日：2014-02-04
申请号：US13602471
申请日：2012-09-04
申请人： Chung-Ting Lu , Chih-Chiang Chang
发明人： Chung-Ting Lu , Chih-Chiang Chang
CPC分类号： H01L27/016 , G06F17/5036 , H01L27/0805
摘要： Some embodiments relate a capacitor array arranged on a semiconductor substrate. The capacitor array includes an array of unit capacitors arranged in a series of rows and columns. An interconnect structure couples unit capacitors of the array to establish a plurality of capacitor elements. The respective capacitor elements have different numbers of unit capacitors and different corresponding capacitances. In establishing the plurality of capacitor elements, the interconnect structure couples unit capacitors of the array in substantially identical sub-arrays tiled over the semiconductor substrate. Other methods and devices are also disclosed.
摘要翻译： 一些实施例涉及布置在半导体衬底上的电容器阵列。 电容器阵列包括布置成一系列行和列的单元电容器阵列。 互连结构耦合阵列的单元电容器以建立多个电容器元件。 各个电容器元件具有不同数量的单位电容器和不同的对应电容。 在建立多个电容器元件时，互连结构将平行于半导体衬底上的基本相同的子阵列中的阵列的单元电容器耦合。 还公开了其它方法和装置。
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