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25 条记录 (耗时 0.016 秒)

    Power MOSFET Device with Self-Aligned Integrated Schottky Diode
    5.
    发明申请
    Power MOSFET Device with Self-Aligned Integrated Schottky Diode 有权
    具有自对准集成肖特基二极管的功率MOSFET器件

    公开(公告)号：US20120292692A1

    公开(公告)日：2012-11-22

    申请号：US13559502

    申请日：2012-07-26

    申请人： Yeeheng Lee ,  Yongping Ding ,  John Chen

    发明人： Yeeheng Lee ,  Yongping Ding ,  John Chen

    IPC分类号： H01L29/786

    CPC分类号： H01L29/7813 ,  H01L21/26586 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/47 ,  H01L29/66719 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/782

    摘要： A power MOSFET device and manufacturing method thereof, includes the steps of selectively depositing a first conductive material in the middle region at the bottom of a contact trench and contacting with light-doped N-type epitaxial layer to form a Schottky junction and depositing a second conductive material at the side wall and bottom corner of the contact trench and contacting with P-type heavy-doped body region to form an ohmic junction. The first and second conductive materials can respectively optimize the performance of the ohmic contact and the Schottky contact without compromise. Meanwhile, the corner of the contact trench is surrounded by P-type heavy-doped region thereby effectively reducing the leakage currents accumulated at the corner of the contact trench.

    摘要翻译： 功率MOSFET器件及其制造方法包括以下步骤：在接触沟槽的底部的中间区域选择性地沉积第一导电材料，并与光掺杂的N型外延层接触以形成肖特基结，并沉积第二导电材料 导电材料在接触沟槽的侧壁和底角处并与P型重掺杂体区域接触以形成欧姆结。 第一和第二导电材料可以分别优化欧姆接触和肖特基接触的性能而不折不扣。 同时，接触沟槽的角部被P型重掺杂区域围绕，从而有效地减少了在接触沟槽的拐角处积聚的漏电流。

    Termination of high voltage (HV) devices with new configurations and methods
    6.
    发明授权
    Termination of high voltage (HV) devices with new configurations and methods 有权
    用新的配置和方法终止高压（HV）设备

    公开(公告)号：US08803251B2

    公开(公告)日：2014-08-12

    申请号：US13135982

    申请日：2011-07-19

    申请人： Yeeheng Lee ,  Madhur Bobde ,  Yongping Ding ,  Jongoh Kim ,  Anup Bhalla

    发明人： Yeeheng Lee ,  Madhur Bobde ,  Yongping Ding ,  Jongoh Kim ,  Anup Bhalla

    IPC分类号： H01L29/06 ,  H01L21/76

    CPC分类号： H01L29/7811 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0649 ,  H01L29/407 ,  H01L29/66734 ,  H01L29/7813

    摘要： This invention discloses a semiconductor power device disposed in a semiconductor substrate comprising a heavily doped region formed on a lightly doped region and having an active cell area and an edge termination area. The edge termination area comprises a plurality of termination trenches formed in the heavily doped region with the termination trenches lined with a dielectric layer and filled with a conductive material therein. The edge termination further includes a plurality of buried guard rings formed as doped regions in the lightly doped region of the semiconductor substrate immediately adjacent to the termination trenches.

    摘要翻译： 本发明公开了一种设置在半导体衬底中的半导体功率器件，包括形成在轻掺杂区域上并具有有源电池区域和边缘端接区域的重掺杂区域。 边缘终止区域包括形成在重掺杂区域中的多个端接沟槽，其中端接沟槽衬有介电层并在其中填充有导电材料。 边缘终端还包括多个掩埋保护环，其形成为紧邻端接沟槽的半导体衬底的轻掺杂区域中的掺杂区域。

    Power MOSFET device with self-aligned integrated Schottky diode
    7.
    发明授权
    Power MOSFET device with self-aligned integrated Schottky diode 有权
    功率MOSFET器件，具有自对准集成肖特基二极管

    公开(公告)号：US08587061B2

    公开(公告)日：2013-11-19

    申请号：US13559502

    申请日：2012-07-26

    申请人： Yeeheng Lee ,  Yongping Ding ,  John Chen

    发明人： Yeeheng Lee ,  Yongping Ding ,  John Chen

    IPC分类号： H01L29/66

    CPC分类号： H01L29/7813 ,  H01L21/26586 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/47 ,  H01L29/66719 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/782

    摘要： A power MOSFET device and manufacturing method thereof, includes the steps of selectively depositing a first conductive material in the middle region at the bottom of a contact trench and contacting with light-doped N-type epitaxial layer to form a Schottky junction and depositing a second conductive material at the side wall and bottom corner of the contact trench and contacting with P-type heavy-doped body region to form an ohmic junction. The first and second conductive materials can respectively optimize the performance of the ohmic contact and the Schottky contact without compromise. Meanwhile, the corner of the contact trench is surrounded by P-type heavy-doped region thereby effectively reducing the leakage currents accumulated at the corner of the contact trench.

    摘要翻译： 功率MOSFET器件及其制造方法包括以下步骤：在接触沟槽的底部的中间区域选择性地沉积第一导电材料，并与光掺杂的N型外延层接触以形成肖特基结，并沉积第二导电材料 导电材料在接触沟槽的侧壁和底角处并与P型重掺杂体区域接触以形成欧姆结。 第一和第二导电材料可以分别优化欧姆接触和肖特基接触的性能而不折不扣。 同时，接触沟槽的角部被P型重掺杂区域围绕，从而有效地减少了在接触沟槽的拐角处积聚的漏电流。

    Power MOSFET Device with Self-Aligned Integrated Schottky and its Manufacturing Method
    8.
    发明申请
    Power MOSFET Device with Self-Aligned Integrated Schottky and its Manufacturing Method 有权
    具有自对准集成肖特基的功率MOSFET器件及其制造方法

    公开(公告)号：US20110316076A1

    公开(公告)日：2011-12-29

    申请号：US12826591

    申请日：2010-06-29

    申请人： Yeeheng Lee ,  Yongping Ding ,  John Chen

    发明人： Yeeheng Lee ,  Yongping Ding ,  John Chen

    IPC分类号： H01L29/78 ,  H01L21/336

    CPC分类号： H01L29/7813 ,  H01L21/26586 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/47 ,  H01L29/66719 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/782

    摘要： A power MOSFET device and manufacturing method thereof, includes the steps of selectively depositing a first conductive material in the middle region at the bottom of a contact trench and contacting with light-doped N-type epitaxial layer to form a Schottky junction and depositing a second conductive material at the side wall and bottom corner of the contact trench and contacting with P-type heavy-doped body region to form an ohmic junction. The first and second conductive materials can respectively optimize the performance of the ohmic contact and the Schottky contact without compromise. Meanwhile, the corner of the contact trench is surrounded by P-type heavy-doped region thereby effectively reducing the leakage currents accumulated at the corner of the contact trench.

    摘要翻译： 功率MOSFET器件及其制造方法包括以下步骤：在接触沟槽的底部的中间区域选择性地沉积第一导电材料，并与光掺杂的N型外延层接触以形成肖特基结，并沉积第二导电材料 导电材料在接触沟槽的侧壁和底角处并与P型重掺杂体区域接触以形成欧姆结。 第一和第二导电材料可以分别优化欧姆接触和肖特基接触的性能而不折不扣。 同时，接触沟槽的角部被P型重掺杂区域围绕，从而有效地减少了在接触沟槽的拐角处积聚的漏电流。

    Power MOSFET device with self-aligned integrated Schottky and its manufacturing method
    9.
    发明授权
    Power MOSFET device with self-aligned integrated Schottky and its manufacturing method 有权
    功率MOSFET器件具有自对准集成肖特基及其制造方法

    公开(公告)号：US08252648B2

    公开(公告)日：2012-08-28

    申请号：US12826591

    申请日：2010-06-29

    申请人： Yeeheng Lee ,  Yongping Ding ,  John Chen

    发明人： Yeeheng Lee ,  Yongping Ding ,  John Chen

    IPC分类号： H01L21/336

    CPC分类号： H01L29/7813 ,  H01L21/26586 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/47 ,  H01L29/66719 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/782

    摘要： A power MOSFET device and manufacturing method thereof, includes the steps of selectively depositing a first conductive material in the middle region at the bottom of a contact trench and contacting with light-doped N-type epitaxial layer to form a Schottky junction and depositing a second conductive material at the side wall and bottom corner of the contact trench and contacting with P-type heavy-doped body region to form an ohmic junction. The first and second conductive materials can respectively optimize the performance of the ohmic contact and the Schottky contact without compromise. Meanwhile, the corner of the contact trench is surrounded by P-type heavy-doped region thereby effectively reducing the leakage currents accumulated at the corner of the contact trench.

    摘要翻译： 功率MOSFET器件及其制造方法包括以下步骤：在接触沟槽的底部的中间区域选择性地沉积第一导电材料，并与光掺杂的N型外延层接触以形成肖特基结，并沉积第二导电材料 导电材料在接触沟槽的侧壁和底角处并与P型重掺杂体区域接触以形成欧姆结。 第一和第二导电材料可以分别优化欧姆接触和肖特基接触的性能而不折不扣。 同时，接触沟槽的角部被P型重掺杂区域围绕，从而有效地减少了在接触沟槽的拐角处积聚的漏电流。