Electrostatic protection device for semiconductor circuit
    1.
    发明授权
    Electrostatic protection device for semiconductor circuit 有权
    半导体电路用静电保护装置

    公开(公告)号:US07808046B2

    公开(公告)日:2010-10-05

    申请号:US11448299

    申请日:2006-06-07

    IPC分类号: H01L23/62

    摘要: The electrostatic protection device includes a semiconductor substrate having a well formed therein. At least two sets of transistor fingers, for example the NMOS type, are spaced apart from each other. Each set of the MOS fingers includes multiple gates arranged in parallel to each other in one direction, and sources and drains alternately arranged at both sides of the gates in the semiconductor substrate. A well pickup surrounding every set of the transistor fingers and extending between any two set of the fingers is formed. Metal wires are connected to at least two portions of each of the drains and are also connected to an input/output pad to which Electrostatic Discharge (ESD) excessive current is introduced.

    摘要翻译: 静电保护装置包括其中良好地形成的半导体衬底。 至少两组晶体管指,例如NMOS型,彼此间隔开。 每组MOS指状物包括在一个方向上彼此平行布置的多个栅极,并且交替地布置在半导体衬底中的栅极的两侧的源极和漏极。 形成围绕每组晶体管指并且在任意两组指状物之间延伸的阱拾取器。 金属线连接到每个漏极的至少两个部分,并且还连接到引入静电放电(ESD)过电流的输入/输出焊盘。