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1.发明授权Method for logic checking to check operation of circuit to be connected to bus 有权用于检查要连接到总线的电路运行的逻辑检查方法公开(公告)号：US08112263B2
公开(公告)日：2012-02-07
申请号：US12432394
申请日：2009-04-29
CPC分类号： G01R31/318357 , G01R31/318314 , G06F17/5022
摘要： To check operation of a circuit to be checked connected to a bus to which at least one master circuit and at least one slave circuit are connected, a model is connected to a bus in place of a master circuit or a slave circuit and cause given signals to be outputted at given timing for checking the operation of the circuit to be checked. Especially, by causing various data transfer to occur at random timing by a plurality of models, it is easy to cause severer than actual conditions to take place easily, enabling to enhance efficiency of checking. For example, when checking operation of a bus arbiter, a plurality of master models are connected in place of a plurality of master circuits to cause a request of bus accessibility to be outputted from each master model at random timing to check arbitration operation of a bus arbiter.
摘要翻译： 为了检查要连接到至少一个主电路和至少一个从电路的总线的检查电路的操作，将模型连接到总线来代替主电路或从电路，并且产生给定信号 在给定的定时输出以检查要检查的电路的操作。 特别是通过多个模型的随机定时进行各种数据传送，容易使实际情况变得更加严重，能够提高检查效率。 例如，当检查总线仲裁器的操作时，代替多个主电路连接多个主机模型，以便在随机定时从每个主模型输出总线可访问性的请求，以检查总线的仲裁操作 仲裁者。
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2.发明授权Method for logic checking to check operation of circuit to be connected to bus 失效用于检查要连接到总线的电路运行的逻辑检查方法公开(公告)号：US07548841B2
公开(公告)日：2009-06-16
申请号：US10291508
申请日：2002-11-12
CPC分类号： G01R31/318357 , G01R31/318314 , G06F17/5022
摘要： To check operation of a circuit to be checked connected to a bus to which at least one master circuit and at least one slave circuit are connected, a model is connected to a bus in place of a master circuit or a slave circuit and cause given signals to be outputted at given timing for checking the operation of the circuit to be checked. Especially, by causing various data transfer to occur at random timing by a plurality of models, it is early to cause severer than actual conditions to take place easily, enabling to enhance efficiency of checking. For example, when checking operation of a bus arbiter, a plurality of master models are connected in place of a plurality of master circuits to cause a request of bus accessibility to be outputted from each master model at random timing to check arbitration operation of a bus arbiter.
摘要翻译： 为了检查要连接到至少一个主电路和至少一个从电路的总线的检查电路的操作，将模型连接到总线来代替主电路或从电路，并且产生给定信号 在给定的定时输出以检查要检查的电路的操作。 特别是通过多种模式的随机定时进行各种数据传送，容易引起比实际情况更严重的问题，能够提高检查效率。 例如，当检查总线仲裁器的操作时，代替多个主电路连接多个主机模型，以便在随机定时从每个主模型输出总线可访问性的请求，以检查总线的仲裁操作 仲裁者。
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3.发明申请METHOD FOR LOGIC CHECKING TO CHECK OPERATION OF CIRCUIT TO BE CONNECTED TO BUS 有权用于检查电路连接到总线的逻辑检查方法公开(公告)号：US20090210597A1
公开(公告)日：2009-08-20
申请号：US12432394
申请日：2009-04-29
IPC分类号： G06F13/00
CPC分类号： G01R31/318357 , G01R31/318314 , G06F17/5022
摘要： To check operation of a circuit to be checked connected to a bus to which at least one master circuit and at least one slave circuit are connected, a model is connected to a bus in place of a master circuit or a slave circuit and cause given signals to be outputted at given timing for checking the operation of the circuit to be checked. Especially, by causing various data transfer to occur at random timing by a plurality of models, it is easy to cause severer than actual conditions to take place easily, enabling to enhance efficiency of checking. For example, when checking operation of a bus arbiter, a plurality of master models are connected in place of a plurality of master circuits to cause a request of bus accessibility to be outputted from each master model at random timing to check arbitration operation of a bus arbiter.
摘要翻译： 为了检查要连接到至少一个主电路和至少一个从电路的总线的检查电路的操作，将模型连接到总线来代替主电路或从电路，并且产生给定信号 在给定的定时输出以检查要检查的电路的操作。 特别是通过多个模型的随机定时进行各种数据传送，容易使实际情况变得更加严重，能够提高检查效率。 例如，当检查总线仲裁器的操作时，代替多个主电路连接多个主机模型，以便在随机定时从每个主模型输出总线可访问性的请求，以检查总线的仲裁操作 仲裁者。
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公开(公告)号：US20090323984A1
公开(公告)日：2009-12-31
申请号：US12492313
申请日：2009-06-26
申请人： Nobuyuki Yuasa
发明人： Nobuyuki Yuasa
IPC分类号： H03G5/02
CPC分类号： H04N5/602 , G06F3/16 , H04N5/44513
摘要： An information processing device according to an embodiment of the present invention includes the following elements: a detection unit configured to detect an amount of change in position of an image data item that is displayed on a display screen; and a processing unit configured to perform image processing on the image data item in accordance with a detection result that is obtained by the detection unit, and to perform audio processing on an audio data item corresponding to the image data item in accordance with the detection result that is obtained by the detection unit.
摘要翻译： 根据本发明实施例的信息处理设备包括以下元件：检测单元，被配置为检测显示在显示屏上的图像数据项的位置变化量; 以及处理单元，被配置为根据由检测单元获得的检测结果对图像数据项进行图像处理，并且根据检测结果对与图像数据项对应的音频数据项执行音频处理 由检测单元获得。
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公开(公告)号：US08774953B2
公开(公告)日：2014-07-08
申请号：US12492313
申请日：2009-06-26
申请人： Nobuyuki Yuasa
发明人： Nobuyuki Yuasa
CPC分类号： H04N5/602 , G06F3/16 , H04N5/44513
摘要： An information processing device according to an embodiment of the present invention includes the following elements: a detection unit configured to detect an amount of change in position of an image data item that is displayed on a display screen; and a processing unit configured to perform image processing on the image data item in accordance with a detection result that is obtained by the detection unit, and to perform audio processing on an audio data item corresponding to the image data item in accordance with the detection result that is obtained by the detection unit.
摘要翻译： 根据本发明实施例的信息处理设备包括以下元件：检测单元，被配置为检测显示在显示屏上的图像数据项的位置变化量; 以及处理单元，被配置为根据由检测单元获得的检测结果对图像数据项进行图像处理，并且根据检测结果对与图像数据项对应的音频数据项执行音频处理 由检测单元获得。
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6.发明申请公开(公告)号：US20100302441A1
公开(公告)日：2010-12-02
申请号：US12788135
申请日：2010-05-26
申请人： Nobuyuki Yuasa
发明人： Nobuyuki Yuasa
IPC分类号： H04N9/475
CPC分类号： H04S7/30
摘要： An information processing apparatus according to the present invention includes: a transformation unit configured to perform an image data transformation processing to transform a shape of image data; a first determination unit configured to determine an output position of audio data in association with the image data based on transformation information regarding the image data transformation processing performed by the transformation unit; and a configuration unit configured to construct a sound field based on the output position determined by the first determination unit.
摘要翻译： 根据本发明的信息处理设备包括：变换单元，被配置为执行图像数据变换处理以变换图像数据的形状; 第一确定单元，被配置为基于关于由所述变换单元执行的图像数据变换处理的变换信息来确定与所述图像数据相关联的音频数据的输出位置; 以及配置单元，被配置为基于由所述第一确定单元确定的所述输出位置构造声场。
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公开(公告)号：US07193738B2
公开(公告)日：2007-03-20
申请号：US10192157
申请日：2002-07-11
申请人： Nobuyuki Yuasa
发明人： Nobuyuki Yuasa
CPC分类号： H04N1/00204 , G06T1/60 , H04N2201/001
摘要： The present invention concerns an image processing device that is connectable to a general-purpose bus of a second image processing apparatus that includes a memory. An image dividing device generates divided images by dividing an original image, and stores the divided images in the memory. An image connecting device generates an original image by connecting divided images stored in the memory.
摘要翻译： 本发明涉及一种可连接到包括存储器的第二图像处理装置的通用总线的图像处理装置。 图像分割装置通过分割原始图像来生成分割图像，并将分割图像存储在存储器中。 图像连接装置通过连接存储在存储器中的分割图像来生成原始图像。
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