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1.发明授权Logic circuit redesign program, logic circuit redesign apparatus, and logic circuit redesign method 失效逻辑电路重新设计程序，逻辑电路重新设计装置和逻辑电路重新设计方法公开(公告)号：US07735028B2
公开(公告)日：2010-06-08
申请号：US11902050
申请日：2007-09-18
申请人： Yoshinori Soejima , Yoshikatsu Kouhara , Hiroaki Shiraishi , Kouichi Tanda , Takakazu Tokunaga , Koji Takatomi
发明人： Yoshinori Soejima , Yoshikatsu Kouhara , Hiroaki Shiraishi , Kouichi Tanda , Takakazu Tokunaga , Koji Takatomi
IPC分类号： G06F17/50
CPC分类号： G06F17/5054
摘要： A computer is allowed to execute an information acquisition process that acquires a file expressing information on pins used in respective ports provided in each block of a logic circuit to be redesigned and information indicating connection relationships between the ports (#2); execute a multiplexer disposition process that, based on the file, classifies pins of output ports of a block into a number of pin groups that is less than the number of pins, and disposes a multiplexer having a function to multiplex a signal output from each pin classified in the same pin group (#11, #13); and execute a demultiplexer disposition process that, based on that file, disposes a demultiplexer having a function to demultiplex signals that have been output from output ports of a block and multiplexed by the multiplexer, and a function to output each demultiplexed signal to input ports of respective input destination blocks (#12, #13).
摘要翻译： 允许计算机执行信息获取处理，获取表示在要重新设计的逻辑电路的每个块中提供的相应端口中使用的引脚的信息的文件和指示端口之间的连接关系的信息（＃2）。 执行多路复用器配置处理，其基于该文件，将块的输出端口的引脚分成小于引脚数的多个引脚组，并且配置具有复用从每个引脚输出的信号的功能的多路复用器 分为同一个针脚组（＃11，＃13）; 并且执行解复用器配置处理，其基于该文件，配置具有从多路复用器的多路复用器的多路复用器多路复用的多路复用器的输出端口输出的多路复用功能的解复用器，以及将各解复用信号输出到 各个输入目的地块（＃12，＃13）。
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公开(公告)号：US20070217444A1
公开(公告)日：2007-09-20
申请号：US11711806
申请日：2007-02-28
IPC分类号： H04L12/66
CPC分类号： G06F17/5045
摘要： A computer capable of easily obtaining RTL of a TOP circuit after a block circuit is separated out of the TOP circuit. A port information input unit inputs the port information of the TOP circuit described in RTL, and the port information of block circuits composing the TOP circuit, from a user. A separation information input unit inputs separation information specifying a block circuit to be separated out of the TOP circuit, from the user. A separation port information creation unit creates separation port information after the block circuit is separated, by changing the port information of the TOP circuit and the block circuits based on the port information of the block circuit to be separated according to the separation information. An RTL rewriting unit rewrites RTL of the TOP circuit from which the block circuit has been separated, based on the separation port information created by the separation port information creation unit.
摘要翻译： 能够在块电路之后容易地获得TOP电路的RTL的计算机从TOP电路分离出来。 端口信息输入单元从用户输入RTL中描述的TOP电路的端口信息和构成TOP电路的块电路的端口信息。 分离信息输入单元从用户输入指定要从TOP电路分离的块电路的分离信息。 分离端口信息创建单元通过根据分离信息根据要分离的块电路的端口信息改变TOP电路和块电路的端口信息，在块电路分离之后创建分离端口信息。 RTL重写单元基于由分离端口信息创建单元创建的分离端口信息重写已经从块电路分离的TOP电路的RTL。
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3.发明申请Logic circuit redesign program, logic circuit redesign apparatus, and logic circuit redesign method 失效逻辑电路重新设计程序，逻辑电路重新设计装置和逻辑电路重新设计方法公开(公告)号：US20080077904A1
公开(公告)日：2008-03-27
申请号：US11902050
申请日：2007-09-18
申请人： Yoshinori Soejima , Yoshikatsu Kouhara , Hiroaki Shiraishi , Kouichi Tanda , Takakazu Tokunaga , Koji Takatomi
发明人： Yoshinori Soejima , Yoshikatsu Kouhara , Hiroaki Shiraishi , Kouichi Tanda , Takakazu Tokunaga , Koji Takatomi
IPC分类号： G06F17/50
CPC分类号： G06F17/5054
摘要： A computer is allowed to execute an information acquisition process that acquires a file expressing information on pins used in respective ports provided in each block of a logic circuit to be redesigned and information indicating connection relationships between the ports (#2); execute a multiplexer disposition process that, based on the file, classifies pins of output ports of a block into a number of pin groups that is less than the number of pins, and disposes a multiplexer having a function to multiplex a signal output from each pin classified in the same pin group (#11, #13); and execute a demultiplexer disposition process that, based on that file, disposes a demultiplexer having a function to demultiplex signals that have been output from output ports of a block and multiplexed by the multiplexer, and a function to output each demultiplexed signal to input ports of respective input destination blocks (#12, #13).
摘要翻译： 允许计算机执行信息获取处理，获取表示在要重新设计的逻辑电路的每个块中提供的相应端口中使用的引脚的信息的文件和指示端口之间的连接关系的信息（＃2）。 执行多路复用器配置处理，其基于该文件，将块的输出端口的引脚分成小于引脚数的多个引脚组，并且配置具有复用从每个引脚输出的信号的功能的多路复用器 分为同一个针脚组（＃11，＃13）; 并且执行解复用器配置处理，其基于该文件，配置具有对多路复用器的多路复用器多路复用的多路复用器的输出端口输出的信号进行解复用的解复用器，以及将各解复用信号输出到 各个输入目的地块（＃12，＃13）。
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4.发明授权File information generating method, file information generating apparatus, and storage medium storing file information generation program 失效文件信息生成方法，文件信息生成装置以及存储文件信息生成程序的存储介质公开(公告)号：US07761822B2
公开(公告)日：2010-07-20
申请号：US12048668
申请日：2008-03-14
IPC分类号： G06F17/50
CPC分类号： G06F17/30067
摘要： A method and apparatus for generating file information including setting clock information regarding a clock condition and a clock speed to be used by a speed conversion circuit block, reconstructing the clock circuit block including a new clock for accommodating insertion of the speed conversion circuit block, and associating connection terminal information indicating a connection relationship of connection terminals with speed conversion object information having set, as a speed conversion object, a connection terminal requiring connection speed conversion. The connection terminal information of the connection terminal set as the speed conversion object is extracted, speed conversion circuit information indicating a connection relationship of the connection terminals in the speed conversion circuit block and connection terminal information having the connection relationship of the connection terminals reconstructed is generated, and file information in which the speed conversion circuit block is inserted between the clock circuit block and the interface block is generated.
摘要翻译： 一种用于产生文件信息的方法和装置，包括设置有关速度转换电路块使用的时钟条件和时钟速度的时钟信息，重构包括用于容纳插入速度转换电路块的新时钟的时钟电路块，以及 将表示连接终端的连接关系的连接终端信息与具有设定的速度转换对象信息相关联，作为速度转换对象，需要连接速度转换的连接终端。 提取设置为速度转换对象的连接终端的连接终端信息，生成指示速度转换电路块中的连接端子的连接关系的速度转换电路信息和重建连接端子的连接关系的连接终端信息 ，并且生成在时钟电路块和接口块之间插入速度转换电路块的文件信息。
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5.发明授权公开(公告)号：US08078423B2
公开(公告)日：2011-12-13
申请号：US11859040
申请日：2007-09-21
IPC分类号： G01R31/3183
CPC分类号： G01R31/318516 , G01R31/31717
摘要： A computer terminal retrieves pin data related to respective pins of a plurality of Field Programmable Gate Array that are mounted on a board. The computer terminal retrieves setting data related to a connection check. Upon retrieving the pin data and the setting data, the computer terminal assigns, as data for the connection check to all the pins that can output data, unique data that is unique to each pin. The computer terminal generates input pin data and output pin data containing the unique data, stores therein the input pin data and the output pin data, and generates checking circuits that check connections between output pins and input pins. The computer terminal generates checking data based on the checking circuits.
摘要翻译： 计算机终端检索与安装在电路板上的多个现场可编程门阵列的相应引脚相关的引脚数据。 计算机终端检索与连接检查相关的设置数据。 在检索引脚数据和设置数据后，计算机终端将连接检查的数据分配给可输出数据的所有引脚，每个引脚唯一的唯一数据。 计算机终端产生输入引脚数据并输出包含唯一数据的引脚数据，在其中存储输入引脚数据和输出引脚数据，并产生检查输出引脚和输入引脚之间的连接的检查电路。 计算机终端根据检查电路生成检查数据。
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6.发明申请FILE INFORMATION GENERATING METHOD, FILE INFORMATION GENERATING APPARATUS, AND STORAGE MEDIUM STORING FILE INFORMATION GENERATION PROGRAM 失效文件信息生成方法，文件信息生成装置和存储介质存储文件信息生成程序公开(公告)号：US20080235530A1
公开(公告)日：2008-09-25
申请号：US12048668
申请日：2008-03-14
IPC分类号： G06F1/08
CPC分类号： G06F17/30067
摘要： A method and apparatus for generating file information including setting clock information regarding a clock condition and a clock speed to be used by a speed conversion circuit block, reconstructing the clock circuit block including a new clock for accommodating insertion of the speed conversion circuit block, and associating connection terminal information indicating a connection relationship of connection terminals with speed conversion object information having set, as a speed conversion object, a connection terminal requiring connection speed conversion. The connection terminal information of the connection terminal set as the speed conversion object is extracted, speed conversion circuit information indicating a connection relationship of the connection terminals in the speed conversion circuit block and connection terminal information having the connection relationship of the connection terminals reconstructed is generated, and file information in which the speed conversion circuit block is inserted between the clock circuit block and the interface block is generated.
摘要翻译： 一种用于产生文件信息的方法和装置，包括设置有关速度转换电路块使用的时钟条件和时钟速度的时钟信息，重构包括用于容纳插入速度转换电路块的新时钟的时钟电路块，以及 将表示连接终端的连接关系的连接终端信息与具有设定的速度转换对象信息相关联，作为速度转换对象，需要连接速度转换的连接终端。 提取设置为速度转换对象的连接终端的连接终端信息，生成指示速度转换电路块中的连接端子的连接关系的速度转换电路信息和重建连接端子的连接关系的连接终端信息 ，并且生成在时钟电路块和接口块之间插入速度转换电路块的文件信息。
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7.发明申请公开(公告)号：US20080097717A1
公开(公告)日：2008-04-24
申请号：US11859040
申请日：2007-09-21
IPC分类号： G01R31/00
CPC分类号： G01R31/318516 , G01R31/31717
摘要： A computer terminal retrieves pin data related to respective pins of a plurality of Field Programmable Gate Array that are mounted on a board. The computer terminal retrieves setting data related to a connection check. Upon retrieving the pin data and the setting data, the computer terminal assigns, as data for the connection check to all the pins that can output data, unique data that is unique to each pin. The computer terminal generates input pin data and output pin data containing the unique data, stores therein the input pin data and the output pin data, and generates checking circuits that check connections between output pins and input pins. The computer terminal generates checking data based on the checking circuits.
摘要翻译： 计算机终端检索与安装在电路板上的多个现场可编程门阵列的相应引脚相关的引脚数据。 计算机终端检索与连接检查相关的设置数据。 在检索引脚数据和设置数据后，计算机终端将连接检查的数据分配给可输出数据的所有引脚，每个引脚唯一的唯一数据。 计算机终端产生输入引脚数据并输出包含唯一数据的引脚数据，在其中存储输入引脚数据和输出引脚数据，并产生检查输出引脚和输入引脚之间的连接的检查电路。 计算机终端根据检查电路生成检查数据。
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公开(公告)号：US07167737B2
公开(公告)日：2007-01-23
申请号：US11028876
申请日：2005-01-03
IPC分类号： A61B5/04
CPC分类号： A61B5/0245 , A61B5/02438 , A61B5/6831 , A61B5/6843
摘要： A heart rate monitoring unit including a heart rate monitor and a belt. The heart rate monitor includes a base having a length defining a longitudinal axis, an electronics unit portion, a first electrode portion, and a first belt connection portion. The electronics unit portion has a first end proximate the first electrode portion and a second end distal from the first electrode portion. The first electrode portion has a first end proximate the electronics unit portion and a second end distal from the electronics unit portion. The first belt connection portion is disposed between the second end of the electronics unit portion and the second end of first electrode portion. The base includes a first electrode secured to the first electrode portion, and an electronics unit secured to the electronics unit portion.
摘要翻译： 包括心率监测器和皮带的心率监测单元。 心率监视器包括具有限定纵向轴线的长度的基座，电子单元部分，第一电极部分和第一皮带连接部分。 电子单元部分具有靠近第一电极部分的第一端和远离第一电极部分的第二端。 第一电极部分具有靠近电子单元部分的第一端和远离电子单元部分的第二端。 第一带连接部分设置在电子单元部分的第二端和第一电极部分的第二端之间。 基座包括固定到第一电极部分的第一电极和固定到电子单元部分的电子单元。
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公开(公告)号：US06957597B2
公开(公告)日：2005-10-25
申请号：US10378418
申请日：2003-02-28
CPC分类号： B62K23/06 , B62L3/02 , Y10T74/20438
摘要： An adjusting apparatus for a bicycle brake control device comprises a brake control member bracket adapted to be mounted to a handlebar and a brake control member movably mounted to the brake control member bracket such that it can move from a brake release position toward a brake operating position. An adjustment member is disposed between the brake control member bracket and the brake control member to adjust an orientation of the brake control member relative to the brake control member bracket when the brake control member is in the brake release position.
摘要翻译： 一种用于自行车制动器控制装置的调节装置，包括适于安装到车把的制动控制构件支架和可移动地安装到制动控制构件支架的制动控制构件，使得其能够从制动释放位置朝向制动操作位置 。 在制动控制构件支架和制动控制构件之间设置有调节构件，以在制动控制构件处于制动器释放位置时调节制动控制构件相对于制动控制构件支架的取向。
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10.发明授权Air conditioner having electrical heating member integrated with heating heat exchanger 有权具有与加热热交换器一体化的电加热构件的空调公开(公告)号：US06265692B1
公开(公告)日：2001-07-24
申请号：US09526007
申请日：2000-03-15
IPC分类号： B60H122
CPC分类号： B60H1/2225 , B60H1/00064 , B60H1/00328 , B60H2001/00107 , B60H2001/00128 , B60H2001/00135 , B60H2001/2296 , F28D1/05366
摘要： In a vehicle air conditioner, an electrical heating member is disposed integrally with a heating heat exchanger including a core portion and upper and lower tanks. An electrical connection portion of the electrical heating member is disposed on a downstream air side of the lower tank of the heating heat exchanger. Therefore, the lower tank of the heating heat exchanger can restrict water from being covered onto the electrical connection portion of the electrical heating member. Thus, an electrical short circuit in the electrical connection portion is prevented, while air flow resistance is restricted from being increased.
摘要翻译： 在车辆空调机中，电加热部件与包括芯部和上下罐的加热热交换器一体地设置。 电加热构件的电连接部分设置在加热热交换器的下槽的下游空气侧。 因此，加热热交换器的下部箱体可以限制水被覆盖在电加热部件的电连接部上。 因此，防止了电气连接部分中的电短路，同时限制了气流阻力的增加。
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