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    D-PSICOSE PRODUCTION METHOD BY D-PSICOSE EPIMERASE
    4.
    发明申请
    D-PSICOSE PRODUCTION METHOD BY D-PSICOSE EPIMERASE 有权
    D-PSICOSE EPIMERASE的D-PSICOSE生产方法

    公开(公告)号：US20100190225A1

    公开(公告)日：2010-07-29

    申请号：US11916182

    申请日：2006-05-30

    Applicant: Deok-Kun Oh ,  Hye-Jung Kim ,  Yong-Joo Lee ,  Sang-Hoon Song ,  Seung-Won Park ,  Jung-Hoon Kim ,  Seong-Bo Kim

    Inventor： Deok-Kun Oh ,  Hye-Jung Kim ,  Yong-Joo Lee ,  Sang-Hoon Song ,  Seung-Won Park ,  Jung-Hoon Kim ,  Seong-Bo Kim

    IPC: C12P7/26 ,  C12N9/90 ,  C07H21/04 ,  C12N15/63

    CPC classification number: C12N9/90

    Abstract: Provided is a method of producing D-psicose using a D-psicose epimerase derived from Agrobacterium tumefaciens. Provided are a protein having an amino acid sequence of SEQ ID NO:1 and having a psicose 3-epimerase activity, a gene encoding the protein, a recombinant expression vector containing the gene, and a method of producing D-psicose by reacting the protein produced on a mass scale with D-fructose. The method of producing D-psicose is an environmentally friendly method using a new enzyme, in which an inexpensive substrate is used, and the activity of the enzyme can be retained for a prolonged time period. Thus, the method can be efficiently used for the mass production of D-psicose.

    Abstract translation: 提供了使用源自根癌土壤杆菌的D-psicose差向异构酶来生产D-灵敏蛋白的方法。 本发明提供了具有SEQ ID NO：1的氨基酸序列并具有拟丝氨酸3-差向异构酶活性的蛋白质，编码该蛋白质的基因，含有该基因的重组表达载体的蛋白质，以及通过使蛋白质 以D-果糖大规模生产。 生产D-灵芝蛋白的方法是使用新的酶的环境友好的方法，其中使用廉价的底物，并且酶的活性可以长时间保留。 因此，该方法可以有效地用于大规模生产D-psicose。

    Computer manufacturing system
    7.
    发明授权
    Computer manufacturing system 失效
    电脑制造系统

    公开(公告)号：US06308496B1

    公开(公告)日：2001-10-30

    申请号：US09302428

    申请日：1999-04-30

    Applicant: Yong-Joo Lee ,  Woo-Gun Suk ,  Byung-Yong Jange

    Inventor： Yong-Joo Lee ,  Woo-Gun Suk ,  Byung-Yong Jange

    IPC: B65B3554

    CPC classification number: B23P21/004 ,  Y10T29/53022 ,  Y10T29/53313 ,  Y10T29/53365 ,  Y10T29/534

    Abstract: The computer manufacturing system includes an assembly unit wherein various assembly parts are assembled into a main chassis according to a process order to complete the assembly of a computer body, an aging and test unit for testing and checking the performance of the computer body transferred from the assembly unit, and a package unit for packaging the computer body transferred from the aging and test unit. The assembly unit, the aging and test unit, and the package unit are sequentially aligned in accordance with process sequences. The assembly unit and the package unit are aligned to the opposite facing each other while the aging and test unit is located between the assembly unit and the package unit.

    Abstract translation: 计算机制造系统包括组装单元，其中根据处理顺序将各种组装部件组装到主机架中以完成计算机机身的组装，老化和测试单元，用于测试和检查从 组装单元和用于包装从老化和测试单元转移的计算机体的包装单元。 组装单元，老化和测试单元以及封装单元根据工艺顺序依次对准。 当老化和测试单元位于组装单元和包装单元之间时，组装单元和包装单元彼此面对对准。

    Methods of forming semiconductor devices having faceted semiconductor patterns
    9.
    发明授权
    Methods of forming semiconductor devices having faceted semiconductor patterns 有权
    形成具有刻面半导体图案的半导体器件的方法

    公开(公告)号：US08703592B2

    公开(公告)日：2014-04-22

    申请号：US13052460

    申请日：2011-03-21

    Applicant: Myung-Sun Kim ,  Dong-Suk Shin ,  Dong-Hyuk Kim ,  Yong-Joo Lee ,  Hoi-Sung Chung

    Inventor： Myung-Sun Kim ,  Dong-Suk Shin ,  Dong-Hyuk Kim ,  Yong-Joo Lee ,  Hoi-Sung Chung

    IPC: H01L21/425

    CPC classification number: H01L29/66636 ,  H01L21/26586 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/7834

    Abstract: Provided are methods of forming semiconductor devices. A method may include preparing a semiconductor substrate including a first region and a second region adjacent the first region. The method may also include forming sacrificial pattern covering the second region and exposing the first region. The method may further include forming a capping layer including a faceted sidewall on the first region using selective epitaxial growth (SEG). The faceted sidewall may be separate from the sacrificial pattern. The sacrificial pattern may be removed. Impurity ions may be implanted into the semiconductor substrate.

    Abstract translation: 提供了形成半导体器件的方法。 一种方法可以包括制备包括第一区域和邻近第一区域的第二区域的半导体衬底。 该方法还可以包括形成覆盖第二区域并暴露第一区域的牺牲图案。 该方法还可以包括使用选择性外延生长（SEG）在第一区域上形成包括有侧壁的覆盖层。 小面侧壁可以与牺牲图案分离。 可以去除牺牲图案。 杂质离子可以注入到半导体衬底中。

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