公开(公告)号：US20060148234A1

公开(公告)日：2006-07-06

申请号：US11154632

申请日：2005-06-17

申请人： Young-shying Chen ,  Hong-Hui Hsu ,  Wei-Chuan Chen ,  Chun-Fei Chuang ,  Ming-Jer Kao

发明人： Young-shying Chen ,  Hong-Hui Hsu ,  Wei-Chuan Chen ,  Chun-Fei Chuang ,  Ming-Jer Kao

IPC分类号： H01L21/00 ,  H01L21/4763

CPC分类号： H01L43/12

摘要： A non-via method of connecting a magnetoelectric element with a conductive line. A magnetoelectric element is formed on a substrate, and spacers are formed on side walls of the magnetoelectric element. A dielectric layer is deposited over the substrate and magnetoelectric element and planarized to a level above the magnetoelectric element. The dielectric layer is etched to expose the upper surface of the magnetoelectric element, and a conductive line is formed on the magnetoelectric element.

摘要翻译： 一种连接磁电元件与导线的非通孔方法。 在基板上形成有磁电元件，在磁电元件的侧壁上形成间隔物。 介电层沉积在衬底和磁电元件上，并平坦化到高于磁电元件的电平。 蚀刻电介质层以暴露磁电元件的上表面，并且在该磁电元件上形成导线。

公开(公告)号：US20100207214A1

公开(公告)日：2010-08-19

申请号：US12372908

申请日：2009-02-18

申请人： Chun-Fei Chuang ,  Chien-Ting Lin ,  Che-Hua Hsu ,  Shao-Hua Hsu ,  Cheng-I Lin

发明人： Chun-Fei Chuang ,  Chien-Ting Lin ,  Che-Hua Hsu ,  Shao-Hua Hsu ,  Cheng-I Lin

IPC分类号： H01L29/80 ,  H01L21/8238

CPC分类号： H01L21/823842 ,  H01L21/28088 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66636 ,  H01L29/7843 ,  H01L29/7848

摘要： A semiconductor device and a method of fabricating the same are described. A substrate having a PMOS area and an NMOS area is provided. A high-k layer is formed on the substrate. A first cap layer is formed on the high-k layer in the PMOS area, and a second cap layer is formed on the high-k layer in the NMOS area, wherein the first cap layer is different from the second cap layer. A metal layer and a polysilicon layer are sequentially formed on the first and second cap layers. The polysilicon layer, the metal layer, the first cap layer, the second cap layer and the high-k layer are patterned to form first and second gate structures respectively in the PMOS and NMOS areas. First source/drain regions are formed in the substrate beside the first gate structure. Second source/drain regions are formed in the substrate beside the second gate structure.

摘要翻译： 对半导体器件及其制造方法进行说明。 提供具有PMOS区域和NMOS区域的衬底。 在基板上形成高k层。 在PMOS区域的高k层上形成第一覆盖层，在NMOS区域的高k层上形成第二覆盖层，其中第一覆盖层与第二覆盖层不同。 在第一和第二盖层上依次形成金属层和多晶硅层。 图案化多晶硅层，金属层，第一覆盖层，第二覆盖层和高k层，以在PMOS和NMOS区域中分别形成第一和第二栅极结构。 在第一栅极结构旁边的基板中形成第一源极/漏极区域。 第二源极/漏极区域形成在第二栅极结构旁边的衬底中。

公开(公告)号：US07816243B2

公开(公告)日：2010-10-19

申请号：US12372908

申请日：2009-02-18

申请人： Chun-Fei Chuang ,  Chien-Ting Lin ,  Che-Hua Hsu ,  Shao-Hua Hsu ,  Cheng-I Lin

发明人： Chun-Fei Chuang ,  Chien-Ting Lin ,  Che-Hua Hsu ,  Shao-Hua Hsu ,  Cheng-I Lin

IPC分类号： H01L21/4763

CPC分类号： H01L21/823842 ,  H01L21/28088 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66636 ,  H01L29/7843 ,  H01L29/7848

摘要： A semiconductor device and a method of fabricating the same are described. A substrate having a PMOS area and an NMOS area is provided. A high-k layer is formed on the substrate. A first cap layer is formed on the high-k layer in the PMOS area, and a second cap layer is formed on the high-k layer in the NMOS area, wherein the first cap layer is different from the second cap layer. A metal layer and a polysilicon layer are sequentially formed on the first and second cap layers. The polysilicon layer, the metal layer, the first cap layer, the second cap layer and the high-k layer are patterned to form first and second gate structures respectively in the PMOS and NMOS areas. First source/drain regions are formed in the substrate beside the first gate structure. Second source/drain regions are formed in the substrate beside the second gate structure.

摘要翻译： 对半导体器件及其制造方法进行说明。 提供具有PMOS区域和NMOS区域的衬底。 在基板上形成高k层。 在PMOS区域的高k层上形成第一覆盖层，在NMOS区域的高k层上形成第二覆盖层，其中第一覆盖层与第二覆盖层不同。 在第一和第二盖层上依次形成金属层和多晶硅层。 图案化多晶硅层，金属层，第一覆盖层，第二覆盖层和高k层，以在PMOS和NMOS区域中分别形成第一和第二栅极结构。 在第一栅极结构旁边的基板中形成第一源极/漏极区域。 第二源极/漏极区域形成在第二栅极结构旁边的衬底中。