公开(公告)号：US12166481B2

公开(公告)日：2024-12-10

申请号：US18183908

申请日：2023-03-14

Applicant: ZHEJIANG LAB

Inventor： Jiani Gu ,  Bing Chen ,  Xiao Yu ,  Chengji Jin ,  Genquan Han

IPC: G11C11/419 ,  H03K19/08 ,  H03K19/21 ,  G11C11/22

Abstract: A method, a unit and circuits for implementing Boolean logics based on computing-in-memory transistors. The method is implemented by using the characteristics and the read-write mode of the computing-in-memory transistor; the basic unit consists of a computing-in-memory transistor and a pull resistor; the pull resistor in the basic unit is connected in series with the transistor, and the gate of the transistor is independent; the basic units can implement sixteen Boolean logic operations through different circuit structures and voltage configuration schemes. Compared with the logic circuit structure of the conventional CMOS transistors, the present disclosure can implement more logic operations with fewer transistors, which greatly optimizes circuit density and computing speed caused by data transmission between storage units and process units.