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1.发明授权公开(公告)号：US07425502B2
公开(公告)日：2008-09-16
申请号：US11828217
申请日：2007-07-25
申请人： Zhijian Lu , Thomas M. Wolf , Scott W. Jessen
发明人： Zhijian Lu , Thomas M. Wolf , Scott W. Jessen
IPC分类号： H01L21/04
CPC分类号： H01L21/76808 , H01L21/31144
摘要： The present invention provides a method for manufacturing an interconnect and a method for manufacturing an integrated circuit including the interconnect. The method of manufacturing an interconnect, among other steps, includes forming a via (160) in a substrate (130) and then forming a base getter material (210) in the via (160). The method further includes forming a photoresist layer (410) over the base getter material (210), the photoresist layer (410) having an opening (420) therein positioned over the via (160), and etching a trench (510) into the substrate (130) using the opening (420) in the photoresist layer (410).
摘要翻译： 本发明提供了一种用于制造互连的方法和用于制造包括该互连的集成电路的方法。 制造互连的方法以及其它步骤包括在衬底（130）中形成通孔（160），然后在通路（160）中形成基底吸气材料（210）。 该方法还包括在基底吸气材料（210）上形成光致抗蚀剂层（410），光致抗蚀剂层（410）在其上具有位于通孔（160）上方的开口（420），并且将沟槽（510）蚀刻到 使用光致抗蚀剂层（410）中的开口（420）的衬底（130）。
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2.发明授权公开(公告)号：US07262129B2
公开(公告)日：2007-08-28
申请号：US10993791
申请日：2004-11-19
申请人： Zhijian Lu , Thomas M. Wolf , Scott W. Jessen
发明人： Zhijian Lu , Thomas M. Wolf , Scott W. Jessen
IPC分类号： H01L21/4763
CPC分类号： H01L21/76808 , H01L21/31144
摘要： The present invention provides a method for manufacturing an interconnect and a method for manufacturing an integrated circuit including the interconnect. The method of manufacturing an interconnect, among other steps, includes forming a via (160) in a substrate (130) and then forming a base getter material (210) in the via (160). The method further includes forming a photoresist layer (410) over the base getter material (210), the photoresist layer (410) having an opening (420) therein positioned over the via (160), and etching a trench (510) into the substrate (130) using the opening (420) in the photoresist layer (410).
摘要翻译： 本发明提供了一种用于制造互连的方法和用于制造包括该互连的集成电路的方法。 制造互连的方法以及其它步骤包括在衬底（130）中形成通孔（160），然后在通路（160）中形成基底吸气材料（210）。 该方法还包括在基底吸气材料（210）上形成光致抗蚀剂层（410），光致抗蚀剂层（410）在其上具有位于通孔（160）上方的开口（420），并且将沟槽（510）蚀刻到 使用光致抗蚀剂层（410）中的开口（420）的衬底（130）。
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公开(公告)号：US20120264293A1
公开(公告)日：2012-10-18
申请号：US13530368
申请日：2012-06-22
IPC分类号： H01L21/768
CPC分类号： H01L27/1104 , H01L27/0207 , H01L27/11 , Y10S257/903
摘要： An integrated circuit containing an array of SRAM cells with T-shaped contacts in the inverters, in which drain connecting segments may extend beyond gate connecting segments by a distance greater than 10 percent of a separation distance between ends of opposite drain connecting segments. The drain connecting segments may also extend beyond gate connecting segments by a distance greater than one-third of the width of the gate connecting segments. A process of forming an integrated circuit containing an array of SRAM cells with T-shaped contacts in which drain connecting segments may extend beyond gate connecting segments by a distance greater than 10 percent of a separation distance between ends of opposite drain connecting segments. A process may also form the drain connecting segments to extend beyond gate connecting segments by greater than one-third of the width of the gate connecting segments.
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公开(公告)号：US20080160457A1
公开(公告)日：2008-07-03
申请号：US11617243
申请日：2006-12-28
CPC分类号： G03B27/68 , G03F7/2028
摘要： An embodiment relates generally to an apparatus for reducing defects. The apparatus includes a spindle adapted to hold a wafer; and at least two light sources configured to direct light to a top-side and a back-side of the wafer
摘要翻译： 实施例一般涉及用于减少缺陷的装置。 该装置包括适于保持晶片的主轴; 以及构造成将光引导到晶片的顶侧和背面的至少两个光源
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公开(公告)号：US10199380B2
公开(公告)日：2019-02-05
申请号：US13043163
申请日：2011-03-08
摘要： An integrated circuit containing an array of SRAM cells with T-shaped contacts in the inverters, in which drain connecting segments may extend beyond gate connecting segments by a distance greater than 10 percent of a separation distance between ends of opposite drain connecting segments. The drain connecting segments may also extend beyond gate connecting segments by a distance greater than one-third of the width of the gate connecting segments. A process of forming an integrated circuit containing an array of SRAM cells with T-shaped contacts in which drain connecting segments may extend beyond gate connecting segments by a distance greater than 10 percent of a separation distance between ends of opposite drain connecting segments. A process may also form the drain connecting segments to extend beyond gate connecting segments by greater than one-third of the width of the gate connecting segments.
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公开(公告)号：US20120258593A1
公开(公告)日：2012-10-11
申请号：US13530410
申请日：2012-06-22
IPC分类号： H01L21/768
CPC分类号： H01L27/1104 , H01L27/0207 , H01L27/11 , Y10S257/903
摘要： An integrated circuit containing an array of SRAM cells with T-shaped contacts in the inverters, in which drain connecting segments may extend beyond gate connecting segments by a distance greater than 10 percent of a separation distance between ends of opposite drain connecting segments. The drain connecting segments may also extend beyond gate connecting segments by a distance greater than one-third of the width of the gate connecting segments. A process of forming an integrated circuit containing an array of SRAM cells with T-shaped contacts in which drain connecting segments may extend beyond gate connecting segments by a distance greater than 10 percent of a separation distance between ends of opposite drain connecting segments. A process may also form the drain connecting segments to extend beyond gate connecting segments by greater than one-third of the width of the gate connecting segments.
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公开(公告)号：US20110204452A1
公开(公告)日：2011-08-25
申请号：US13044628
申请日：2011-03-10
IPC分类号： H01L27/11
CPC分类号： H01L27/1104 , H01L27/0207 , H01L27/11 , Y10S257/903
摘要： An integrated circuit containing an array of SRAM cells with T-shaped contacts in the inverters, in which drain connecting segments may extend beyond gate connecting segments by a distance greater than 10 percent of a separation distance between ends of opposite drain connecting segments. The drain connecting segments may also extend beyond gate connecting segments by a distance greater than one-third of the width of the gate connecting segments. A process of forming an integrated circuit containing an array of SRAM cells with T-shaped contacts in which drain connecting segments may extend beyond gate connecting segments by a distance greater than 10 percent of a separation distance between ends of opposite drain connecting segments. A process may also form the drain connecting segments to extend beyond gate connecting segments by greater than one-third of the width of the gate connecting segments.
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公开(公告)号：US20110159684A1
公开(公告)日：2011-06-30
申请号：US13043163
申请日：2011-03-08
IPC分类号： H01L21/768
CPC分类号： H01L27/1104 , H01L27/0207 , H01L27/11 , Y10S257/903
摘要： An integrated circuit containing an array of SRAM cells with T-shaped contacts in the inverters, in which drain connecting segments may extend beyond gate connecting segments by a distance greater than 10 percent of a separation distance between ends of opposite drain connecting segments. The drain connecting segments may also extend beyond gate connecting segments by a distance greater than one-third of the width of the gate connecting segments. A process of forming an integrated circuit containing an array of SRAM cells with T-shaped contacts in which drain connecting segments may extend beyond gate connecting segments by a distance greater than 10 percent of a separation distance between ends of opposite drain connecting segments. A process may also form the drain connecting segments to extend beyond gate connecting segments by greater than one-third of the width of the gate connecting segments.
摘要翻译： 一种集成电路，其包含在反相器中具有T形触点的SRAM单元的阵列，其中漏极连接段可以延伸超过栅极连接段超过相对的漏极连接段的端部之间的间隔距离的10％的距离。 排水连接段也可以超过栅极连接段延伸大于栅极连接段的宽度的三分之一的距离。 一种形成集成电路的过程，该集成电路包含具有T形触点的SRAM单元阵列，其中漏极连接段可以延伸超过栅极连接段超过相对的漏极连接段的端部之间的间隔距离的10％的距离。 一个过程也可以形成排水连接段，以超过栅极连接段超过栅极连接段的宽度的三分之一。
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9.发明申请公开(公告)号：US20090053624A1
公开(公告)日：2009-02-26
申请号：US12262617
申请日：2008-10-31
申请人： Sean C. O'Brien , Scott W. Jessen
发明人： Sean C. O'Brien , Scott W. Jessen
IPC分类号： G03F1/14
CPC分类号： G03F1/36
摘要： Modifying merged sub-resolution assist features includes receiving a mask pattern comprising the merged sub-resolution assist features, where a segmenting sub-resolution assist feature intersects a segmented sub-resolution assist feature at an intersection. Each sub-resolution assist feature is represented by an axis of the sub-resolution assist feature. The length of at least one axis is established, and an axis is modified in accordance with the length. Each axis is converted to a sub-resolution assist feature to yield the modified merged sub-resolution assist features.
摘要翻译： 修改合并的子分辨率辅助特征包括接收包括合并的子分辨率辅助特征的掩模图案，其中分割的子分辨率辅助特征与交叉点处的分段的子分辨率辅助特征相交。 每个子分辨率辅助特征由子分辨率辅助特征的轴表示。 确定至少一个轴的长度，并根据长度修改轴。 每个轴被转换为子分辨率辅助功能以产生修改的合并子分辨率辅助特征。
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公开(公告)号：US10163911B2
公开(公告)日：2018-12-25
申请号：US12479266
申请日：2009-06-05
IPC分类号： H01L27/088 , H01L27/11 , H01L27/02
摘要： An integrated circuit containing an array of SRAM cells with T-shaped contacts in the inverters, in which drain connecting segments may extend beyond gate connecting segments by a distance greater than 10 percent of a separation distance between ends of opposite drain connecting segments. The drain connecting segments may also extend beyond gate connecting segments by a distance greater than one-third of the width of the gate connecting segments. A process of forming an integrated circuit containing an array of SRAM cells with T-shaped contacts in which drain connecting segments may extend beyond gate connecting segments by a distance greater than 10 percent of a separation distance between ends of opposite drain connecting segments. A process may also form the drain connecting segments to extend beyond gate connecting segments by greater than one-third of the width of the gate connecting segments.
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