摘要:
A method for fabricating a silicide gate field effect transistor includes masking a silicon source/drain region prior to forming the silicide gate by annealing a metal silicide forming metal layer contacting a silicon-containing gate. The silicide gate may be either a fully silicided gate or a partially silicided gate. After unmasking the source/drain region a silicide layer may be formed upon the source/drain region, and also upon the partially silicided gate. The second silicide layer and the partially silicided gate also provide a fully silicided gate.
摘要:
A sheet resistance stabilized recrystallized antimony doped region may be formed within a semiconductor substrate by annealing a corresponding antimony doped amorphized region at a temperature from about 1050° C. to about 1400° C. for a time period from about 0.1 to about 10 milliseconds. Preferably, a laser surface treatment is used. The laser surface treatment preferably uses a solid phase epitaxy. In addition, the antimony doped region may be co-doped with at least one of a phosphorus dopant and an arsenic dopant. The antimony dopant and the laser surface treatment lend sheet resistance stability that is otherwise absent when forming solely phosphorus and/or arsenic doped regions.
摘要:
Methods of fabricating a semiconductor structure including heterogeneous suicides or germanides located in different regions of a semiconductor structure are provided. The heterogeneous suicides or germanides are formed onto a semiconductor layer, a conductive layer or both. In accordance with the present invention, the inventive methods utilize a combination of sequential deposition of different metals and patterning to form different suicides or germanides in different regions of a semiconductor chip. The method includes providing a Si-containing or Ge layer having at least a first region and a second region; forming a first silicide or germanide on one of the first or second regions; and forming a second silicide or germanide that is compositionally different from the first silicide or germanide on the other region not including the first silicide or germanide, wherein the steps of forming the first and second suicides or germanides are performed sequentially or in a single step.
摘要:
A trailer jack stand for supporting a trailer comprising: a pedestal stand, where stand attaches to a trailer jack, said stand includes a top connecting section and a pivoting section; a center mount pin, where the mount pin attaches the stand to the jack through the top connecting section; a locking pin, where the locking pin secures the mount pin into place; a platform, where the platform attaches to the bottom of the pivoting section; and a spring assembly, where the spring assembly includes a top pivot pin extending from the top connecting section, a stand pin extending from the pivoting section and a spring attached between the pivot pin and stand pin. The pivoting section is capable of pivoting between a retracted position and an extended position, where in the extended position the stand supports the trailer.
摘要:
A mold form fryer utilizing a top conveyor that transports snack pieces through a constant velocity oil stream without the need for a bottom mating mold or conveyor. Herein, the form fryer is provided with a top conveyor disposed above a fryer oil pan positioned longitudinally through the fryer. Uncooked snack pieces are provided to the fryer oil pan by a bottom entrance conveyor. Snack pieces, once in oil within the fryer, meet with a top conveyor having convex molding surfaces with product-centering elements. At the exit portion of the fryer, a bottom exit conveyor receives the cooked snack pieces from the top conveyor. As no continuous bottom conveyor is utilized, the fryer oil pan may be provided with a reduced volume segment situated between the bottom entrance and exit conveyors.
摘要:
A method for making a semiconductor device structure includes producing a substrate having formed thereon a gate with spacers, respective source and drain regions adjacent to the gate and an; disposing a first metallic layer on the gate with spacers, and the source and drain regions, disposing a second metallic layer on the first metallic layer; doping the first metallic layer with a first dopant through a portion of the second metal layer disposed over the second gate with spacers; and then heating the intermediate structure to a temperature and for a time sufficient to form a silicide of the first metallic layer. This first layer is, for example, Ni while the second layer is, for example, TiN.
摘要:
In an embodiment of a method of financing an entity, such as an asset management firm, a financing provider invests assets in the entity. The financing provider receives a revenue share interest in the financed entity. No ownership interest in the entity is given to the financing provider during the term of the revenue share interest, and no debt is used. To evaluate and price the investment, a revenue forecasting model may be used.
摘要:
An integration scheme for providing Si gates for nFET devices and SiGe gates for pFET devices on the same semiconductor substrate is provided. The integration scheme includes first providing a material stack comprising, from bottom to top, a gate dielectric, a Si film, and a hard mask on a surface of a semiconductor substrate that includes at least one nFET device region and at least one pFET device region. Next, the hard mask is selectively removed from the material stack in the at least one pFET device region thereby exposing the Si film. The exposed Si film is then converted into a SiGe film and thereafter at least one nFET device is formed in the least one nFET device region and at least one pFET device is formed in the at least one pFET device region. In accordance with the present invention, the least one nFET device includes a Si gate and the at least one pFET includes a SiGe gate.
摘要:
A method for engineering stress in the channels of MOS transistors of different conductivity using highly stressed nitride films in combination with selective semiconductor-on-insulator (SOI) device architecture is described. A method of using compressive and tensile nitride films in the shallow trench isolation (STI) process is described. High values of stress are achieved when the method is applied to a selective SOI architecture.
摘要:
A mold form fryer utilizing a top conveyor that transports snack pieces through a constant velocity oil stream without the need of a bottom mating mold or conveyor. Herein, the form fryer is provided with a top conveyor disposed above a fryer oil pan positioned longitudinally through the fryer. Uncooked snack pieces are provided to the fryer oil pan by a bottom entrance conveyor. Snack pieces, once in oil within the fryer, meet with a top conveyor having convex molding surfaces with product-centering elements. At the exit portion of the fryer, a bottom exit conveyor receives the cooked snack pieces from the top conveyor. As no continuous bottom conveyor is utilized, the fryer oil pan may be provided with a reduced volume segment situated between the bottom entrance and exit conveyors.