公开(公告)号：US20240345164A1

公开(公告)日：2024-10-17

申请号：US18312600

申请日：2023-05-05

Applicant: ASMedia Technology Inc.

Inventor： Te-Ming Kung

IPC: G01R31/3185 ,  G01R31/317 ,  G01R31/3183

CPC classification number: G01R31/318572 ,  G01R31/31723 ,  G01R31/318371

Abstract: A testing system and a testing method are provided. The testing system includes a first testing device and a second testing device. The first testing device is coupled to a first stream facing-port of a device under test (DUT). The first testing device includes a controller. The second testing device is coupled to a second stream facing-port of the DUT. The controller transmits a testing signal to the DUT through the first stream facing-port to test a universal serial bus (USB) of the DUT. The DUT is operated based on the testing signal to generate a data signal. The DUT outputs the data signal to the second testing device through the second stream facing-port. The second testing device obtains status information of the DUT which is operated based on the testing signal 10 to generate a testing result. The controller determines whether the DUT is normal according to the testing result.

公开(公告)号：US20240154589A1

公开(公告)日：2024-05-09

申请号：US18088618

申请日：2022-12-26

Applicant: ASMedia Technology Inc.

Inventor： Chieh-Jui Ho

IPC: H03F3/45 ,  H03F1/08 ,  H03F1/56

CPC classification number: H03F3/45179 ,  H03F1/086 ,  H03F1/565

Abstract: A differential amplifier circuit is provided. The differential amplifier circuit includes a differential amplifier, a first active inductor, a second active inductor, and a parameter circuit. The differential amplifier includes a first differential output terminal and a second differential output terminal. The first active inductor is coupled to the first differential output terminal. The second active inductor is coupled to the second differential output terminal. The parameter circuit is coupled between the first active inductor and the second active inductor. The parameter circuit provides at least one parameter. A low frequency gain, an equivalent impedance, and a bandwidth of the differential amplifier circuit are adjusted in response to the at least one parameter.

公开(公告)号：US20240014836A1

公开(公告)日：2024-01-11

申请号：US17890271

申请日：2022-08-18

Applicant: ASMedia Technology Inc.

Inventor： Chieh-Jui Ho

IPC: H04B1/04 ,  H02H9/04

CPC classification number: H04B1/0475 ,  H02H9/045

Abstract: A transmission circuit is provided. The transmission circuit includes a T-coil, a first resistance value generator, a second resistance value generator and a capacitance value generator. The first resistance value generator generates a first resistance value according to a first control signal. The second resistance value generator generates a second resistance value according to a second control signal. The capacitance value generator generates a capacitance value according to a third control signal. A gain spectrum of the transmission circuit is adjusted according to the first resistance value, the second resistance value and the capacitance value.

公开(公告)号：US20200334286A1

公开(公告)日：2020-10-22

申请号：US16441032

申请日：2019-06-14

Applicant: ASMedia Technology Inc.

Inventor： Wei-Kan Hwang

IPC: G06F16/58 ,  G06N3/08 ,  G06F16/53 ,  G06K9/62 ,  G06F9/46

Abstract: A data storage apparatus and a data prediction method thereof are provided. The data storage apparatus includes a memory unit and a prediction unit. The prediction unit acquires a plurality of access location data of a plurality of data access actions of a prior access history of the memory unit. The prediction unit analyzes the prior access history of the memory unit. The prediction unit performs a quantification process on the access location data to acquire a plurality of quantized data corresponding to the prior access history. The prediction unit predicts a data pre-accessing target of the memory unit according to the quantized data.

公开(公告)号：US10108571B2

公开(公告)日：2018-10-23

申请号：US14936696

申请日：2015-11-10

Applicant: ASMedia Technology Inc.

Inventor： Hsin-Chih Huang ,  Wei-Yun Chang

IPC: G06F13/366 ,  G06F13/40

Abstract: A data transmission method includes: determining a sum of first service proportions and a sum of second service proportions according to a first transmission rate of at least one first device, a second transmission rate of at least one second device, and a maximum bandwidth of a host transmission interface; determining at least one first service proportion of the first device according to the sum of the first service proportions, and determining at least one second service proportion of the second device according to the sum of the second service proportions; and transmitting at least one package of first transmission data of the first device and at least one package of second transmission data of the second device to a host via the host transmission interface according to the first service proportion and the second service proportion.

公开(公告)号：US20140217963A1

公开(公告)日：2014-08-07

申请号：US14156452

申请日：2014-01-16

Applicant: ASMedia Technology Inc.

Inventor： Ting-Wen SU

IPC: H02J7/00

CPC classification number: H02H9/025

Abstract: A protective circuit is provided. The protective circuit includes a charging unit, a voltage regulating unit, and a comparing unit. The charging unit receives a rise signal and an over-current signal, and outputs a first reference voltage. The voltage regulating unit receives the first reference voltage and adjusts an output voltage according, to the first reference voltage and a feedback voltage. The comparing unit receives the feedback voltage and compares the feedback voltage with a first threshold voltage to determine whether to output the rise signal to the charging unit.

Abstract translation: 提供保护电路。 保护电路包括充电单元，电压调节单元和比较单元。 充电单元接收上升信号和过电流信号，并输出第一参考电压。 电压调节单元接收第一参考电压并根据第一参考电压和反馈电压调节输出电压。 比较单元接收反馈电压并将反馈电压与第一阈值电压进行比较，以确定是否将上升信号输出到充电单元。

公开(公告)号：US08732367B2

公开(公告)日：2014-05-20

申请号：US13352532

申请日：2012-01-18

Applicant: Ching-Chih Lin ,  Pao-Shun Tseng ,  Wen-Hung Peng

Inventor： Ching-Chih Lin ,  Pao-Shun Tseng ,  Wen-Hung Peng

IPC: G06F13/36 ,  G06F13/362 ,  G06F12/00 ,  G06F13/14 ,  G06F13/38

CPC classification number: G06F13/4295 ,  G06F13/362

Abstract: A bus host controller and a method thereof are provided. If a terminal device coupled to the bus is a non-periodic device, the bus host controller places a higher priority on data packet transferring request than start-of-frame (SOF) packet transferring request.

Abstract translation: 提供总线主机控制器及其方法。 如果耦合到总线的终端设备是非周期性设备，则与起始帧（SOF）分组传送请求相比，总线主机控制器对数据分组传送请求具有更高的优先级。

公开(公告)号：US20130089122A1

公开(公告)日：2013-04-11

申请号：US13470365

申请日：2012-05-14

Applicant: Shu-Yu Lin ,  Sheng-Chung Wu

Inventor： Shu-Yu Lin ,  Sheng-Chung Wu

IPC: H04B1/44

CPC classification number: H04B1/44 ,  H04L25/0264 ,  H04L25/03885

Abstract: A method for adaptively driving data transmission and a communication device using the same are provided. The proposed method includes following procedures. Detection result is generated after detecting a receiving signal on a receiving path of the communication device. Driving parameter is generated according to the detection result. Finally, a transmitting signal on a transmitting path is adjusted according to the driving parameter.

Abstract translation: 提供一种用于自适应地驱动数据传输的方法和使用该方法的通信装置。 所提出的方法包括以下步骤。 在检测到通信装置的接收路径上的接收信号之后产生检测结果。 根据检测结果生成驱动参数。 最后，根据驱动参数调整发送路径上的发送信号。

公开(公告)号：US20090248965A1

公开(公告)日：2009-10-01

申请号：US12401466

申请日：2009-03-10

Applicant: Yuan-Huei Lee ,  Chi Chang ,  Chia-Hsin Chen ,  Ming-Che Liu

Inventor： Yuan-Huei Lee ,  Chi Chang ,  Chia-Hsin Chen ,  Ming-Che Liu

IPC: G06F12/02 ,  G06F12/00

CPC classification number: G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7208

Abstract: A hybrid flash memory device and a control method of the hybrid flash memory device are provided. The hybrid flash memory device includes a micro controller connected to a host bus for receiving data to be written in the hybrid flash memory device from a host via the host bus; and a memory module coupled to the micro controller. The flash module includes a first type of flash memory and a second type of flash memory. The data are determined to be written in a first log block of the first type of flash memory when the data size is not greater than a predetermined data size. On the contrary, the data are determined to be written in a second log block of the second type of flash memory when the data size is greater than the predetermined data size.

Abstract translation: 提供一种混合式闪速存储装置和混合式闪速存储装置的控制方法。 混合式闪速存储装置包括连接到主机总线的微控制器，用于经由主机总线从主机接收要写入混合式闪速存储器装置的数据; 以及耦合到所述微控制器的存储器模块。 闪存模块包括第一类型的闪存和第二类闪存。 当数据大小不大于预定数据大小时，数据被确定为被写入第一类闪速存储器的第一对数块中。 相反，当数据大小大于预定数据大小时，确定数据被写入第二类闪存的第二对数块中。

公开(公告)号：US20060268940A1

公开(公告)日：2006-11-30

申请号：US11418262

申请日：2006-05-05

Applicant: Chin-Sung Hsu ,  Ching-Chih Lin ,  Hsu-Hsun Tsai

Inventor： Chin-Sung Hsu ,  Ching-Chih Lin ,  Hsu-Hsun Tsai

IPC: H04J3/08

CPC classification number: G06F13/405

Abstract: A serial port interface extending apparatus used in an electronic device comprises a serial signal processing unit, a signal switching unit and a plurality of serial port interfaces. The serial port interfaces are all connected to the signal switch unit. The serial signal processing unit controls the signal switch unit to select one of the serial port interfaces to be connected to the serial signal processing unit.

Abstract translation: 在电子设备中使用的串行端口接口扩展装置包括串行信号处理单元，信号切换单元和多个串行端口接口。 串口接口都连接到信号开关单元。 串行信号处理单元控制信号切换单元选择要连接到串行信号处理单元的串行端口之一。