公开(公告)号：US07728373B2

公开(公告)日：2010-06-01

申请号：US11705109

申请日：2007-02-12

申请人： Hyeoung-Won Seo ,  Jae-Man Yoon ,  Kang-Yoon Lee ,  Bong-Soo Kim

发明人： Hyeoung-Won Seo ,  Jae-Man Yoon ,  Kang-Yoon Lee ,  Bong-Soo Kim

IPC分类号： H01L21/2842

CPC分类号： H01L29/66628 ,  H01L27/10814 ,  H01L27/10876 ,  H01L27/10894 ,  H01L29/7834

摘要： A semiconductor device may include a substrate having a cell active region. A cell gate electrode may be formed in the cell active region. A cell gate capping layer may be formed on the cell gate electrode. At least two cell epitaxial layers may be formed on the cell active region. One of the at least two cell epitaxial layers may extend to one end of the cell gate capping layer and another one of the at least two cell epitaxial layers may extend to an opposite end of the cell gate capping layer. Cell impurity regions may be disposed in the cell active region. The cell impurity regions may correspond to a respective one of the at least two cell epitaxial layers.

摘要翻译： 半导体器件可以包括具有电池有源区的衬底。 可以在电池活性区域中形成电池栅电极。 单元栅极覆盖层可以形成在单元栅电极上。 至少两个电池外延层可以形成在电池有源区上。 至少两个单元外延层中的一个可以延伸到单元栅极覆盖层的一端，并且至少两个单元外延层中的另一个可以延伸到单元栅极覆盖层的相对端。 电池杂质区域可以设置在电池活性区域中。 电池杂质区域可以对应于至少两个电池外延层中的相应一个。

公开(公告)号：US07019349B2

公开(公告)日：2006-03-28

申请号：US10817954

申请日：2004-04-06

申请人： Ryota Katsumata ,  Hideaki Aochi

发明人： Ryota Katsumata ,  Hideaki Aochi

IPC分类号： H01L21/2842 ,  H01L29/94

CPC分类号： H01L29/66181 ,  H01L27/10823 ,  H01L27/10826 ,  H01L27/10838 ,  H01L27/1087 ,  H01L27/10876 ,  H01L27/10879 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/945

摘要： A semiconductor memory device includes a trench capacitor formed in a major surface portion of a semiconductor substrate. The trench capacitor includes a storage node electrode provided within a trench formed in the major surface portion of substrate, a plate electrode disposed opposed to the storage node electrode, and a capacitor insulation film provided between the storage node electrode and plate electrode and formed of high-dielectric-constant material. The memory device further includes an insulated-gate field-effect transistor formed in the major surface portion of substrate, a contact portion that electrically connects a source or drain of the IGFET and the storage node electrode, and a cap structure formed between the contact portion and upper parts of the storage node electrode.

摘要翻译： 半导体存储器件包括形成在半导体衬底的主表面部分中的沟槽电容器。 沟槽电容器包括设置在形成于基板的主表面部分的沟槽内的存储节点电极，与存储节点电极相对设置的平板电极，以及设置在存储节点电极与板极之间并形成为高电平的电容绝缘膜 - 介电常数材料。 存储器件还包括形成在衬底的主表面部分中的绝缘栅场效应晶体管，将IGFET的源极或漏极与存储节点电极电连接的接触部分，以及形成在接触部分 和存储节点电极的上部。